{"id":2228718,"url":"http://patchwork.ozlabs.org/api/patches/2228718/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260427085843.42460-2-fengchengwen@huawei.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260427085843.42460-2-fengchengwen@huawei.com>","list_archive_url":null,"date":"2026-04-27T08:58:38","name":"[v5,1/6] PCI/TPH: Fix pcie_tph_get_st_table_loc() field extraction","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"726db17e7adcf49f7a57e2a7711b3cd3d0ce9676","submitter":{"id":92756,"url":"http://patchwork.ozlabs.org/api/people/92756/?format=json","name":"Chengwen Feng","email":"fengchengwen@huawei.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260427085843.42460-2-fengchengwen@huawei.com/mbox/","series":[{"id":501609,"url":"http://patchwork.ozlabs.org/api/series/501609/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=501609","date":"2026-04-27T08:58:42","name":"vfio/pci: Add PCIe TPH support","version":5,"mbox":"http://patchwork.ozlabs.org/series/501609/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228718/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228718/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=GQ9s0NCQ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=7nlljrvCqU78VC/MnyFqbpq9PR/5AYoPcaH4Y7KRztM=;\n\tb=GQ9s0NCQSQxZGlRcvsgaqak7Y0xelQ6OKl4WQJjm5P1G7OABVm/8MXltm7GoqeLCnCqlGAtAM\n\t4PTfASgpV/ju7IJpd1o0/IshXlnZOrVNX9jO1bg6XREIH5n6QFIv2ZJa6su8XhO7ntAuxXiTS2+\n\t4IUok1W7zL7ITbEugA3KIrE=","From":"Chengwen Feng ","To":", ","CC":", ,\n\t, ,\n\t, , ","Subject":"[PATCH v5 1/6] PCI/TPH: Fix pcie_tph_get_st_table_loc() field\n extraction","Date":"Mon, 27 Apr 2026 16:58:38 +0800","Message-ID":"<20260427085843.42460-2-fengchengwen@huawei.com>","X-Mailer":"git-send-email 2.17.1","In-Reply-To":"<20260427085843.42460-1-fengchengwen@huawei.com>","References":"<20260427085843.42460-1-fengchengwen@huawei.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain","X-ClientProxiedBy":"kwepems100002.china.huawei.com (7.221.188.206) To\n kwepemk500009.china.huawei.com (7.202.194.94)"},"content":"pcie_tph_get_st_table_loc() incorrectly uses FIELD_GET(), which shifts the\nfield value to bit 0. But the function is designed to return raw\nPCI_TPH_LOC_* values as defined in the function comment.\n\nThis causes incorrect ST table location detection. Fix it by using bitwise\nAND with PCI_TPH_CAP_LOC_MASK to return the unshifted field value matching\nthe function specification.\n\nFixes: d2e8a34876ce (\"PCI/TPH: Add Steering Tag support\")\nCc: stable@vger.kernel.org\nSigned-off-by: Chengwen Feng \n---\n drivers/pci/tph.c | 8 +-------\n 1 file changed, 1 insertion(+), 7 deletions(-)","diff":"diff --git a/drivers/pci/tph.c b/drivers/pci/tph.c\nindex 91145e8d9d95..f17b74b5fb1e 100644\n--- a/drivers/pci/tph.c\n+++ b/drivers/pci/tph.c\n@@ -170,7 +170,7 @@ u32 pcie_tph_get_st_table_loc(struct pci_dev *pdev)\n \n \tpci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CAP, ®);\n \n-\treturn FIELD_GET(PCI_TPH_CAP_LOC_MASK, reg);\n+\treturn reg & PCI_TPH_CAP_LOC_MASK;\n }\n EXPORT_SYMBOL(pcie_tph_get_st_table_loc);\n \n@@ -183,11 +183,7 @@ u16 pcie_tph_get_st_table_size(struct pci_dev *pdev)\n \tu32 reg;\n \tu32 loc;\n \n-\t/* Check ST table location first */\n \tloc = pcie_tph_get_st_table_loc(pdev);\n-\n-\t/* Convert loc to match with PCI_TPH_LOC_* defined in pci_regs.h */\n-\tloc = FIELD_PREP(PCI_TPH_CAP_LOC_MASK, loc);\n \tif (loc != PCI_TPH_LOC_CAP)\n \t\treturn 0;\n \n@@ -316,8 +312,6 @@ int pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index, u16 tag)\n \tset_ctrl_reg_req_en(pdev, PCI_TPH_REQ_DISABLE);\n \n \tloc = pcie_tph_get_st_table_loc(pdev);\n-\t/* Convert loc to match with PCI_TPH_LOC_* */\n-\tloc = FIELD_PREP(PCI_TPH_CAP_LOC_MASK, loc);\n \n \tswitch (loc) {\n \tcase PCI_TPH_LOC_MSIX:\n","prefixes":["v5","1/6"]}