{"id":2228077,"url":"http://patchwork.ozlabs.org/api/patches/2228077/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/7a94a5f4cf84c11c7fba7485e666ecbaddfbe5cf.1777058942.git.dawid.glazik@linux.intel.com/","project":{"id":57,"url":"http://patchwork.ozlabs.org/api/projects/57/?format=json","name":"Linux ASPEED SoC development","link_name":"linux-aspeed","list_id":"linux-aspeed.lists.ozlabs.org","list_email":"linux-aspeed@lists.ozlabs.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<7a94a5f4cf84c11c7fba7485e666ecbaddfbe5cf.1777058942.git.dawid.glazik@linux.intel.com>","list_archive_url":null,"date":"2026-04-24T20:21:01","name":"[v4,3/3] ARM: dts: aspeed-g6: Add nodes for i3c controllers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4d014f8ed1f1056d83dbda9d35672bdb3dec3f3d","submitter":{"id":93095,"url":"http://patchwork.ozlabs.org/api/people/93095/?format=json","name":"Dawid Glazik","email":"dawid.glazik@linux.intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/7a94a5f4cf84c11c7fba7485e666ecbaddfbe5cf.1777058942.git.dawid.glazik@linux.intel.com/mbox/","series":[{"id":501420,"url":"http://patchwork.ozlabs.org/api/series/501420/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=501420","date":"2026-04-24T20:21:01","name":"ARM: dts: aspeed-g6: add AST2600 I3C nodes and bindings","version":4,"mbox":"http://patchwork.ozlabs.org/series/501420/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228077/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228077/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=CbRl8ZqZ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; helo=lists.ozlabs.org;\n envelope-from=linux-aspeed+bounces-3955-incoming=patchwork.ozlabs.org@lists.ozlabs.org;\n receiver=patchwork.ozlabs.org)","lists.ozlabs.org;\n arc=none smtp.remote-ip=192.198.163.18","lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","lists.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=CbRl8ZqZ;\n\tdkim-atps=neutral","lists.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=linux.intel.com\n (client-ip=192.198.163.18; helo=mgamail.intel.com;\n envelope-from=dawid.glazik@linux.intel.com; receiver=lists.ozlabs.org)"],"Received":["from lists.ozlabs.org (lists.ozlabs.org\n [IPv6:2404:9400:21b9:f100::1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1 raw public key)\n server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g2fqB5gv4z1yHv\n\tfor ; Sat, 25 Apr 2026 16:21:26 +1000 (AEST)","from boromir.ozlabs.org (localhost [127.0.0.1])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 4g2fq92ytNz2ydj;\n\tSat, 25 Apr 2026 16:21:25 +1000 (AEST)","from mgamail.intel.com (mgamail.intel.com [192.198.163.18])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 4g2NB02rsMz2xTh\n\tfor ; Sat, 25 Apr 2026 05:21:43 +1000 (AEST)","from orviesa006.jf.intel.com ([10.64.159.146])\n by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Apr 2026 12:21:43 -0700","from gklab-103a-129.igk.intel.com ([10.91.103.129])\n by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Apr 2026 12:21:40 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1777058505;\n\tcv=none;\n b=HTZh4Bn5Y0UoJKY90BNeGc6R6+RVaCR3NC3eklMrhh2omyk74+QV5R2nOr52fu2sqsHtK7Ds/Qu+xoulmn6y3Bbrxm4aRTaX9kEiZOyH+9mgzlH4KCdX3wfRc52nas/MBd1no3EJPpIBCFVztn5M0/biMMz+WxNbkd9xGBjwQ7Ih5PYBb8qjwdVYiUNiDsEZFV+h57rWpje/PsGkjQ9wzjDZ+Ai0AnBABSaxpw4MtPY68e/aAgSbmuOzNfPFKYeexHCCA2B/nvuO5Xsy7H7R08N7rqwMty8HECbbLVFK9wS350owQXUHHbakmT5R6I2L5TlNaImJwx9TYab8Y9SZMA==","ARC-Message-Signature":"i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707;\n\tt=1777058505; c=relaxed/relaxed;\n\tbh=D5UPxw3T48FJ/vk7uItxWIhxvBUTqVp74nlh/1zpits=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=jeMxZQ3AajPjjH6WJt82C3uPJMjWF8IEZ7jrbb9AfzLcHcxZN+ihK1gOfKrf+0DLTN3pbows0X0weeab3e35V2Fhzd2yHnASTaEgSNKbTcBYsm1t+ZMSq5LePgdv4RUt0BrNuVlkIgNHFS4NWhmui3uMfB98XiNg/ZfW+tI1RHMD5egTXvRsJW6GBNmPZicKb+QBPjeS4UHeLQV6DU3QSfVZF23/J2sGPxRRNjaBvQVCMNVbKmjtk5oilwiHzoE5XjMJZBJujOWsgzjY8wsdPoK22jOUmpJLyVJwHAkTuNGawdQeLjoYnXVazmtyHdZcER+Ssn902mAZ4WTzoVMEzg==","ARC-Authentication-Results":"i=1; lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n dkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=CbRl8ZqZ; dkim-atps=neutral;\n spf=pass (client-ip=192.198.163.18; helo=mgamail.intel.com;\n envelope-from=dawid.glazik@linux.intel.com;\n receiver=lists.ozlabs.org) smtp.mailfrom=linux.intel.com","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777058504; x=1808594504;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=i6qFgr4BdGt7bca1DzWlDakJS74x3G3JFyTvjzdSAes=;\n b=CbRl8ZqZszFLZgGkz0F8Qa36JbOqOFkii5YXF0WDkFkSiSakxyfdilzl\n FLOHeesU77dVn1wb+Z6WkNCzCLbpFImydN39ZvBsKtJJ2d+b1aDogONqP\n 9ajAgxMl4IOqUOTDTSa0YBlJS+iImWC1vsjHBdvYwp6tEnHe9jp4xW6n9\n u/2SqUGuSZMlDQ8gP9H1OidPjstqVdBgsiFMgHIazaRAaQNKEV3LnG1mI\n uBctbnHf8Frd7EDKMr+6F9hVZZURLmzYYfU7+f5bLjrnPs3yLrRFl7Iae\n ICESxV9j9dmxi3BeVtBnDp2EUIhX9Nqrk2SBEVEFU75IArKeT+CXaDWcO\n A==;","X-CSE-ConnectionGUID":["kHSxGfbZTTGRgAyWI71iRg==","Vwc3PpAlRdeK88HXvq8J4w=="],"X-CSE-MsgGUID":["yRQxi5DqR2Kn0OS8o8zFXw==","8rWdw2j+R3ypnvJ12arYeA=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11766\"; a=\"77208296\"","E=Sophos;i=\"6.23,197,1770624000\";\n d=\"scan'208\";a=\"77208296\"","E=Sophos;i=\"6.23,197,1770624000\";\n d=\"scan'208\";a=\"232040512\""],"X-ExtLoop1":"1","From":"Dawid Glazik ","To":"Lee Jones ,\n\tRob Herring ,\n\tKrzysztof Kozlowski ,\n\tConor Dooley ,\n\tJoel Stanley ,\n\tAndrew Jeffery ,\n\tlinux-aspeed@lists.ozlabs.org","Cc":"devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org,\n\tdawid.glazik@linux.intel.com,\n\tmaciej.lawniczak@intel.com,\n\tJeremy Kerr ","Subject":"[PATCH v4 3/3] ARM: dts: aspeed-g6: Add nodes for i3c controllers","Date":"Fri, 24 Apr 2026 22:21:01 +0200","Message-ID":"\n <7a94a5f4cf84c11c7fba7485e666ecbaddfbe5cf.1777058942.git.dawid.glazik@linux.intel.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"","References":"","X-Mailing-List":"linux-aspeed@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Archive":",\n ","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Organization":"Intel Technology Poland sp. z o.o. - ul. Slowackiego 173,\n 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316","Content-Transfer-Encoding":"8bit","X-Spam-Status":"No, score=-2.3 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"Add the i3c controller devices to the ast2600 g6 common dts. We add all\n6 busses to the common g6 definition, but leave disabled through the\nstatus property, to be enabled per-platform.\n\nSuggested-by: Jeremy Kerr \nSigned-off-by: Dawid Glazik \n---\nv4:\n - removed i3c aliases\n - renamed i3c-global node name to generic: syscon\nv3:\n - add i3c aliases\n - rebase on top of latest tree and solve conflicts\n - as agreed with Jeremy off-list, he said I can take authorship of this going forward\nv2:\n - use inline bus representation, without the i3c: label\n---\n arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 91 +++++++++++++++++++++++++\n 1 file changed, 91 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\nindex f5641128614f..51a6a4157f1b 100644\n--- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\n+++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\n@@ -1066,6 +1066,97 @@ i2c15: i2c@800 {\n \t\t\t\t};\n \t\t\t};\n \n+\t\t\tbus@1e7a0000 {\n+\t\t\t\tcompatible = \"simple-bus\";\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <1>;\n+\t\t\t\tranges = <0 0x1e7a0000 0x8000>;\n+\n+\t\t\t\ti3c_global: syscon@0 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c-global\", \"syscon\";\n+\t\t\t\t\treg = <0x0 0x1000>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I3C_DMA>;\n+\t\t\t\t};\n+\n+\t\t\t\ti3c0: i3c@2000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x2000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C0CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c1_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 0>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c1: i3c@3000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x3000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C1CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c2_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 1>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c2: i3c@4000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x4000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C2CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c3_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 2>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c3: i3c@5000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x5000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C3CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c4_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 3>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c4: i3c@6000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x6000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C4CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c5_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 4>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c5: i3c@7000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x7000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C5CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c6_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 5>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\t\t\t};\n+\n \t\t\tfsim0: fsi@1e79b000 {\n \t\t\t\t#interrupt-cells = <1>;\n \t\t\t\tcompatible = \"aspeed,ast2600-fsi-master\";\n","prefixes":["v4","3/3"]}