{"id":2228035,"url":"http://patchwork.ozlabs.org/api/patches/2228035/?format=json","web_url":"http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260425005916.3321811-2-guoren@kernel.org/","project":{"id":70,"url":"http://patchwork.ozlabs.org/api/projects/70/?format=json","name":"Linux KVM RISC-V","link_name":"kvm-riscv","list_id":"kvm-riscv.lists.infradead.org","list_email":"kvm-riscv@lists.infradead.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"http://lists.infradead.org/pipermail/kvm-riscv/","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260425005916.3321811-2-guoren@kernel.org>","list_archive_url":null,"date":"2026-04-25T00:59:13","name":"[V2,1/4] RISC-V: KVM: AIA: Make HGEI number and management fully per-CPU","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4ce855ccf7674f374305fc223a4ebc3efc6f548c","submitter":{"id":75626,"url":"http://patchwork.ozlabs.org/api/people/75626/?format=json","name":"Guo Ren","email":"guoren@kernel.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/kvm-riscv/patch/20260425005916.3321811-2-guoren@kernel.org/mbox/","series":[{"id":501412,"url":"http://patchwork.ozlabs.org/api/series/501412/?format=json","web_url":"http://patchwork.ozlabs.org/project/kvm-riscv/list/?series=501412","date":"2026-04-25T00:59:13","name":"RISC-V: KVM: AIA: Convert HGEI management to fully per-HART","version":2,"mbox":"http://patchwork.ozlabs.org/series/501412/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228035/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228035/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=qRAgrCNh;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=mGjRELfo;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=zEfwLZSqPQ4ZocqI8LsI7I/hOKfKbn2g1dBmRPxI09E=; b=qRAgrCNh/PwoMv\n\tsQxLHz950e5AP8fVMfGgv0G6qe/FBLtDzfphbYfMpiqPoOBGZqfpZQE1EuZgKoR7j9sT7oeFfT4sm\n\tg0NahT0DOD6T7jS7rrDcfaAlGuaFJ5T7JYVLZ56AareGBEgsCjTGb3jW8pWIn9x4KPDC368HavAGX\n\tP3YBF3UOLZERV1aveWaRPz8tRc/C7dSOvC8huDoO0+vY/0poZoz/rKjxfLX6sv5xJgxKAn0y+K3hd\n\tF1YRDQv7gFBEkU7Mz5v/OdCmDxmvTJwR/gasx1ouWY27iZIp7F0i2wA75xZN0pvqQSHoliPBWkE4S\n\tcn9/veBHJCEuoSiTfr8w==;","v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1777078787;\n\tbh=cERsT3FzaAmTn0XF4uxIOLVAlPMEYfFsUqX/c6wlcfg=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=mGjRELfo7XWL9qHq5ylh6aclUwW/sJetbl2K/qhuO2k1euJ9vGRQFrEkvL6U848iy\n\t 3ci7xTEhydCrgj3UXsvRX+tWbe73FMLL/Z58JnTtDWfUzShbW+EfaSR87jljlaEFtZ\n\t S3mvJxY5T8DWw1XybYwLy8jPCJlpEweZtxB9M/PgE3KbO0O7QjOC9GVLSzM1T5SBz5\n\t G6tVeCSKrP/+r1uvIhVbNHeebv4V5l7vkjPIiVZ+B4RR0IYypjRf3wdgP8xR2ErWWn\n\t kVMOZw6Rb7tB85DpBIf6lEpsb8IeUPlSiR5bThkD6B0roMe4QGhDq08Cv4HeAMET5g\n\t YBwOBxJjmBNWQ=="],"From":"guoren@kernel.org","To":"guoren@kernel.org","Cc":"alex@ghiti.fr,\n\tanup@brainfault.org,\n\taou@eecs.berkeley.edu,\n\tatish.patra@linux.dev,\n\tcp0613@linux.alibaba.com,\n\tfangyu.yu@linux.alibaba.com,\n\tgaohan@iscas.ac.cn,\n\tinochiama@gmail.com,\n\tkvm-riscv@lists.infradead.org,\n\tkvm@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-riscv@lists.infradead.org,\n\tme@ziyao.cc,\n\tpalmer@dabbelt.com,\n\tpjw@kernel.org,\n\ttglx@kernel.org","Subject":"[PATCH V2 1/4] RISC-V: KVM: AIA: Make HGEI number and management\n fully per-CPU","Date":"Sat, 25 Apr 2026 00:59:13 +0000","Message-ID":"<20260425005916.3321811-2-guoren@kernel.org>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260425005916.3321811-1-guoren@kernel.org>","References":"<20260425005916.3321811-1-guoren@kernel.org>","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20260424_175948_065619_95702D8D ","X-CRM114-Status":"GOOD ( 16.75 )","X-Spam-Score":"-2.1 (--)","X-Spam-Report":"Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: From: \"Guo Ren (Alibaba DAMO Academy)\" \n Previously the number of Hypervisor Guest External Interrupt (HGEI) lines\n was stored in a single global variable `kvm_riscv_aia_nr_hgei` and assumed\n to be the same for all HARTs. This assumption does [...]\n Content analysis details: (-2.1 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS SPF: sender matches SPF record\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n -0.0 DKIMWL_WL_HIGH DKIMwl.org - High trust sender","X-BeenThere":"kvm-riscv@lists.infradead.org","X-Mailman-Version":"2.1.34","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"kvm-riscv\" ","Errors-To":"kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"From: \"Guo Ren (Alibaba DAMO Academy)\" \n\nPreviously the number of Hypervisor Guest External Interrupt (HGEI)\nlines was stored in a single global variable `kvm_riscv_aia_nr_hgei`\nand assumed to be the same for all HARTs. This assumption does not\nhold on heterogeneous RISC-V SoCs where different cores may expose\ndifferent HGEIE CSR widths.\n\nIntroduce `nr_hgei` field into the per-CPU `struct aia_hgei_control`\nand probe the actual supported HGEI count for the current HART in\n`kvm_riscv_aia_enable()` using the standard RISC-V CSR probe\ntechnique:\n\n csr_write(CSR_HGEIE, -1UL);\n nr = fls_long(csr_read(CSR_HGEIE));\n if (nr)\n nr--;\n\nAll HGEI allocation, free and disable paths (`kvm_riscv_aia_free_hgei()`,\n`kvm_riscv_aia_disable()`, etc.) now use the per-CPU value instead of\nthe global one.\n\nThe early global `kvm_riscv_aia_nr_hgei` is kept only for deciding\nwhether SGEI interrupt registration is needed; the real per-HART\ninitialization of lock and free_bitmap is moved to enable time.\n\nThis makes KVM AIA robust on big.LITTLE-style and multi-vendor\nasymmetric platforms.\n\nSigned-off-by: Guo Ren (Alibaba DAMO Academy) \n---\n arch/riscv/kvm/aia.c | 40 ++++++++++++++++++++++++----------------\n 1 file changed, 24 insertions(+), 16 deletions(-)","diff":"diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c\nindex 5ec503288555..a23729052cfb 100644\n--- a/arch/riscv/kvm/aia.c\n+++ b/arch/riscv/kvm/aia.c\n@@ -23,6 +23,7 @@ struct aia_hgei_control {\n \traw_spinlock_t lock;\n \tunsigned long free_bitmap;\n \tstruct kvm_vcpu *owners[BITS_PER_LONG];\n+\tunsigned int nr_hgei;\n };\n static DEFINE_PER_CPU(struct aia_hgei_control, aia_hgei);\n static int hgei_parent_irq;\n@@ -452,7 +453,7 @@ void kvm_riscv_aia_free_hgei(int cpu, int hgei)\n \n \traw_spin_lock_irqsave(&hgctrl->lock, flags);\n \n-\tif (hgei > 0 && hgei <= kvm_riscv_aia_nr_hgei) {\n+\tif (hgei > 0 && hgei <= hgctrl->nr_hgei) {\n \t\tif (!(hgctrl->free_bitmap & BIT(hgei))) {\n \t\t\thgctrl->free_bitmap |= BIT(hgei);\n \t\t\thgctrl->owners[hgei] = NULL;\n@@ -486,21 +487,8 @@ static irqreturn_t hgei_interrupt(int irq, void *dev_id)\n \n static int aia_hgei_init(void)\n {\n-\tint cpu, rc;\n+\tint rc;\n \tstruct irq_domain *domain;\n-\tstruct aia_hgei_control *hgctrl;\n-\n-\t/* Initialize per-CPU guest external interrupt line management */\n-\tfor_each_possible_cpu(cpu) {\n-\t\thgctrl = per_cpu_ptr(&aia_hgei, cpu);\n-\t\traw_spin_lock_init(&hgctrl->lock);\n-\t\tif (kvm_riscv_aia_nr_hgei) {\n-\t\t\thgctrl->free_bitmap =\n-\t\t\t\tBIT(kvm_riscv_aia_nr_hgei + 1) - 1;\n-\t\t\thgctrl->free_bitmap &= ~BIT(0);\n-\t\t} else\n-\t\t\thgctrl->free_bitmap = 0;\n-\t}\n \n \t/* Skip SGEI interrupt setup for zero guest external interrupts */\n \tif (!kvm_riscv_aia_nr_hgei)\n@@ -545,9 +533,29 @@ static void aia_hgei_exit(void)\n \n void kvm_riscv_aia_enable(void)\n {\n+\tstruct aia_hgei_control *hgctrl;\n+\n \tif (!kvm_riscv_aia_available())\n \t\treturn;\n \n+\thgctrl = this_cpu_ptr(&aia_hgei);\n+\n+\t/* Figure-out number of bits in HGEIE */\n+\tcsr_write(CSR_HGEIE, -1UL);\n+\thgctrl->nr_hgei = fls_long(csr_read(CSR_HGEIE));\n+\tcsr_write(CSR_HGEIE, 0);\n+\tif (hgctrl->nr_hgei)\n+\t\thgctrl->nr_hgei--;\n+\n+\tif (hgctrl->nr_hgei) {\n+\t\thgctrl->free_bitmap = BIT(hgctrl->nr_hgei + 1) - 1;\n+\t\thgctrl->free_bitmap &= ~BIT(0);\n+\t} else {\n+\t\thgctrl->free_bitmap = 0;\n+\t}\n+\n+\traw_spin_lock_init(&hgctrl->lock);\n+\n \tcsr_write(CSR_HVICTL, aia_hvictl_value(false));\n \tcsr_write(CSR_HVIPRIO1, 0x0);\n \tcsr_write(CSR_HVIPRIO2, 0x0);\n@@ -588,7 +596,7 @@ void kvm_riscv_aia_disable(void)\n \n \traw_spin_lock_irqsave(&hgctrl->lock, flags);\n \n-\tfor (i = 0; i <= kvm_riscv_aia_nr_hgei; i++) {\n+\tfor (i = 0; i <= hgctrl->nr_hgei; i++) {\n \t\tvcpu = hgctrl->owners[i];\n \t\tif (!vcpu)\n \t\t\tcontinue;\n","prefixes":["V2","1/4"]}