{"id":2228025,"url":"http://patchwork.ozlabs.org/api/patches/2228025/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/a533fcbd-de94-4444-856c-ad7ab93c4251@oss.qualcomm.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2026-04-24T20:45:30","name":"[to-be-committed,RISC-V,PR,target/124984] Fix RTL checking abort in thead memory address classification","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"9a43923edc4b59fd36458b6379a751dea281a9dd","submitter":{"id":92310,"url":"http://patchwork.ozlabs.org/api/people/92310/?format=json","name":"Jeffrey Law","email":"jeffrey.law@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/a533fcbd-de94-4444-856c-ad7ab93c4251@oss.qualcomm.com/mbox/","series":[{"id":501405,"url":"http://patchwork.ozlabs.org/api/series/501405/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=501405","date":"2026-04-24T20:45:30","name":"[to-be-committed,RISC-V,PR,target/124984] Fix RTL checking abort in thead memory address classification","version":1,"mbox":"http://patchwork.ozlabs.org/series/501405/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228025/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228025/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=geqzVU0l;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=Qr+6sFCB;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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boundary=\"------------jv7MMSLAFXv2exafTWuOn1w1\"","Message-ID":"","Date":"Fri, 24 Apr 2026 14:45:30 -0600","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Content-Language":"en-US","To":"'GCC Patches' ","From":"Jeffrey Law ","Subject":"[to-be-committed][RISC-V][PR target/124984] Fix RTL checking abort in\n thead memory address classification","X-Authority-Analysis":"v=2.4 cv=cdDiaHDM c=1 sm=1 tr=0 ts=69ebd66d cx=c_pps\n a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=asGLMfRmzhnGNxaIYohjRg==:17\n a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=r77TgQKjGQsHNAKrUKIA:9\n a=qYIfiMubUK46uB6Nco4A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10\n a=zgiPjhLxNE0A:10 a=Fl24XjX0Ou921kynevsA:9 a=B2y7HmGcmWMA:10\n a=bBxd6f-gb0O0v-kibOvt:22","X-Proofpoint-GUID":"jc7KWwPNELU4Y9qxGVJXeXJomuD9pBu3","X-Proofpoint-ORIG-GUID":"jc7KWwPNELU4Y9qxGVJXeXJomuD9pBu3","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDI0MDIwMiBTYWx0ZWRfX5JRcY51GokwW\n R7Y50Rr1IEKGDoyALV+CB0CpKvxJvBDBa2zbU7xEreVZIb8mMaeLYiu8958Ju2SsLDtevhWgh+y\n T/PD6MnZ9mnW5S2cVCrSg3QvniP9IKPA6l6q/Dp/0GEjCVXAWOqGBgO+Dka9SWUuBZB9hE7fUPK\n 6T1Vrn6zlTXw/1ZXSgbzWl5y9Tsy4mPkcqs1IsLQspfHHgNQSo5L94ARN6rHyQubPBhHbRjH6Y7\n JuSJ6oRWyoHENbzgqhOp8L8ar+DrB3Vz4IfdP2yQL4REBFSRPEUy5UFku1Zwu6n11rPXxqdV+rC\n 3ensfmIQRPI7BOIoxPs6N+yDtzBSX0Tj5eMFjUnkrUcgkHygagw87XrYFUxc/XoMn7jkGkn1FhX\n cS8sHUTv4F1Tv9RbVjpAgW39naf9Q40n4n8u0MJoJNTPXdxEIikLqZL6YfK6bcgnGEUiBpsYtvU\n hmVuKVcXC4BDQ28dfww==","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-24_03,2026-04-21_02,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n clxscore=1015 malwarescore=0 spamscore=0 impostorscore=0 lowpriorityscore=0\n suspectscore=0 phishscore=0 bulkscore=0 adultscore=0 priorityscore=1501\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604240202","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"As shown in the PR, we can trigger an RTL checking abort when \nclassifying thead specific addressing modes. As far as I can tell, the \ncode is supposed to be extracting constant value from the multiply \noperation, but instead is referencing the wrong object.\n\nThe fix is trivial.  I don't think this is anywhere near serious enough \nto try to get into the imminent gcc-16 release.  So after pre-commit \ntesting is done I'll push to the trunk, then backport in a week or so \nafter the gcc-16 release has been made.\n\nThis has been regression tested on riscv64-elf and riscv32-elf. While it \nwill spin on the Pioneer overnight, which has the relevant thead \nextensions, they aren't enabled by default, so I don't really expect any \nmeaningful improvements to coverage.\n\nJeff\nPR target/124984\ngcc/\n\t* config/riscv/thead.cc (th_memidx_classify_address_index): Extract\n\tconstant multiplicand value from the right object.\n\ngcc/testsuite\n\t* gcc.target/riscv/pr124984.c: New test.","diff":"diff --git a/gcc/config/riscv/thead.cc b/gcc/config/riscv/thead.cc\nindex f43bfdbb354..1f25af96e7f 100644\n--- a/gcc/config/riscv/thead.cc\n+++ b/gcc/config/riscv/thead.cc\n@@ -678,7 +678,7 @@ th_memidx_classify_address_index (struct riscv_address_info *info, rtx x,\n {\n type = (GET_CODE (XEXP (offset, 0)) == SIGN_EXTEND)\n \t ? ADDRESS_REG_REG : ADDRESS_REG_UREG;\n- shift = exact_log2 (INTVAL (XEXP (x, 1)));\n+ shift = exact_log2 (INTVAL (offset));\n offset = XEXP (XEXP (x, 0), 0);\n }\n /* (ashift:X (reg:X) (const_int shift)) */\ndiff --git a/gcc/testsuite/gcc.target/riscv/pr124984.c b/gcc/testsuite/gcc.target/riscv/pr124984.c\nnew file mode 100644\nindex 00000000000..7d1124893b7\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/pr124984.c\n@@ -0,0 +1,10 @@\n+/* { dg-do compile { target bitint } } */\n+/* { dg-options \"-mcpu=thead-c906 -ftracer -fno-tree-dominator-opts -O2 -fharden-conditional-branches\" } */\n+\n+int g;\n+\n+void\n+foo(int s)\n+{\n+ g = 0x258d9b711584058072a68c6c9d0ff404fd077b87d59ee75dd2e349825d3a288c61a054e3aa1804c26adb2b9ce2287f17888af3aca18a430bcb4f334672553aecd010e5618a1293691bfd6f3e1d0d8ea3dbdb9176a53d1f657032263707cae4e5e70badc7769309b006495fbd3e76ca25f4d02df66107dc351e928wb >> (s & 1023);\n+}\n","prefixes":["to-be-committed","RISC-V","PR","target/124984"]}