{"id":2228004,"url":"http://patchwork.ozlabs.org/api/patches/2228004/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424191129.1494381-5-daniel.barboza@oss.qualcomm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260424191129.1494381-5-daniel.barboza@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-24T19:11:29","name":"[v5,4/4] docs: add riscv-server-ref.rst","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6f12a739eebeecdf24a21bcf45b68ba0ea135707","submitter":{"id":92288,"url":"http://patchwork.ozlabs.org/api/people/92288/?format=json","name":"Daniel Henrique Barboza","email":"daniel.barboza@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424191129.1494381-5-daniel.barboza@oss.qualcomm.com/mbox/","series":[{"id":501400,"url":"http://patchwork.ozlabs.org/api/series/501400/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501400","date":"2026-04-24T19:11:25","name":"hw/riscv: Server Platform Reference Board","version":5,"mbox":"http://patchwork.ozlabs.org/series/501400/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228004/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228004/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 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helo=mx0b-0031df01.pphosted.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Add documentation for the new riscv-server-ref board.\n\nSigned-off-by: Daniel Henrique Barboza \n---\n docs/system/riscv/riscv-server-ref.rst | 31 ++++++++++++++++++++++++++\n docs/system/target-riscv.rst | 1 +\n 2 files changed, 32 insertions(+)\n create mode 100644 docs/system/riscv/riscv-server-ref.rst","diff":"diff --git a/docs/system/riscv/riscv-server-ref.rst b/docs/system/riscv/riscv-server-ref.rst\nnew file mode 100644\nindex 0000000000..acf7110b96\n--- /dev/null\n+++ b/docs/system/riscv/riscv-server-ref.rst\n@@ -0,0 +1,31 @@\n+.. SPDX-License-Identifier: GPL-2.0-or-later\n+\n+RISC-V Server Platform Reference board (``riscv-server-ref``)\n+=============================================================\n+\n+The RISC-V Server Platform specification `spec`_ defines a standardized\n+set of hardware and software capabilities that portable system software,\n+such as OS and hypervisors, can rely on being present in a RISC-V server\n+platform. This machine aims to emulate this specification, providing\n+an environment for firmware/OS development and testing.\n+\n+The main features included in the riscv-server-ref board are:\n+\n+* IOMMU platform device (riscv-iommu-sys)\n+* AIA\n+* PCIe AHCI\n+* PCIe NIC\n+* No virtio mmio bus\n+* No fw_cfg device\n+* No ACPI table\n+* Minimal device tree nodes\n+\n+There are multiple ways of using this reference board, some of them being:\n+\n+* BIOS: u-boot-spl.bin; SD-CARD: ; NVME: \n+* BIOS: fw_dynamic.bin; KERNEL: u-boot.bin; NVME: \n+* BIOS: fw_dynamic.bin; KERNEL: EDK2.fd; NVME: \n+* BIOS: fw_dynamic.bin; KERNEL: ; INITRD: \n+\n+\n+.. _spec: https://github.com/riscv-non-isa/riscv-server-platform\ndiff --git a/docs/system/target-riscv.rst b/docs/system/target-riscv.rst\nindex 3ad5d1ddaf..3f7690331b 100644\n--- a/docs/system/target-riscv.rst\n+++ b/docs/system/target-riscv.rst\n@@ -73,6 +73,7 @@ undocumented; you can get a complete list by running\n riscv/sifive_u\n riscv/virt\n riscv/xiangshan-kunminghu\n+ riscv/riscv-server-ref\n \n RISC-V CPU firmware\n -------------------\n","prefixes":["v5","4/4"]}