{"id":2227841,"url":"http://patchwork.ozlabs.org/api/patches/2227841/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424104325.81484-1-philmd@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260424104325.81484-1-philmd@linaro.org>","list_archive_url":null,"date":"2026-04-24T10:43:25","name":"[v3] target/s390x: Leverage 128-bit vector type in V{L, ST}L opcodes","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"af5ecb4c548cda07fbf070718d8459b7c42d7e61","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424104325.81484-1-philmd@linaro.org/mbox/","series":[{"id":501344,"url":"http://patchwork.ozlabs.org/api/series/501344/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501344","date":"2026-04-24T10:43:25","name":"[v3] target/s390x: Leverage 128-bit vector type in V{L, ST}L opcodes","version":3,"mbox":"http://patchwork.ozlabs.org/series/501344/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227841/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227841/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=yF6/NFxr;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g28hm4t3bz1xvV\n\tfor ; Fri, 24 Apr 2026 20:44:08 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGE0V-0005sl-07; Fri, 24 Apr 2026 06:43:35 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wGE0S-0005rQ-1w\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 06:43:32 -0400","from mail-wm1-x330.google.com ([2a00:1450:4864:20::330])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from ) id 1wGE0P-0003ua-NI\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 06:43:31 -0400","by mail-wm1-x330.google.com with SMTP id\n 5b1f17b1804b1-488b0046078so69591945e9.1\n for ; Fri, 24 Apr 2026 03:43:29 -0700 (PDT)","from localhost.localdomain (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-48a66533ff4sm10927015e9.6.2026.04.24.03.43.26\n (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256);\n Fri, 24 Apr 2026 03:43:26 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1777027408; x=1777632208; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n :to:from:from:to:cc:subject:date:message-id:reply-to;\n bh=E2wkN1bufIhL14IHSKnpj7rUkgY1Gqo3hqaNAVYj5As=;\n b=yF6/NFxrTrDyN2H1xKSPRMffX36PQQDCDbXeTaoJOLk3omw0vFBSmCrORIfZH5JH1r\n KlJe9cTuD95+JTvepd0rVGTzFQB83C+mDH+m4uYQOTBrJfDXY3bScHJ0tz/ABxnaI9UB\n isSSXL3Nvous7Omu+VJL1gJuYDzj0RQudCEdFgqOyE+Ey4XyNZKAXn92o6sAcNIcCthw\n LlGrZxLVJy5m+CauODGzt931OhrTE65CtbQzUJaQuO1q2STOeATRYfYgQ77cErUjxzh4\n 6g4vz/6ZGXzdqGg8whJ22OFgR7SYakzcOwtbeOMdVLOUbhuHb02RubjlQZJnusgg0zU3\n aQsg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777027408; x=1777632208;\n h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date\n :message-id:reply-to;\n bh=E2wkN1bufIhL14IHSKnpj7rUkgY1Gqo3hqaNAVYj5As=;\n b=B9RlXmsjWBjIYcvYdpchUPMjGdwqMcmcWsCnRQNTz5H5PNdspmnZXL2H/8OhewDo5E\n 6wamCyniZjY/Gphs2MFG6xWI3OarG+XUfggZ1vk7vvPZsd6Wb0U7o9CSK1sZMa/k13nr\n WlgWiDQhSC3NgiggXLCpKSwavOqwKUDflvVUj0wJWzz8aXCevNUvS49sQJ265D/34/MO\n lWuTpQTNszEq0nYx5gkJnRHh3mw/u3PXHUq+Iqh9mT4zDBX9csCXXU0qaNTOU9J6z+vX\n blZ1km7YknZ/jq0UssZy0T8f17Liw7lO+AnuTzzQnm9RuPM8ham+7dwe5hhqL0qm1P7x\n EVTg==","X-Gm-Message-State":"AOJu0Ywsr40SEZEqtd6uCKkVttJDaGpLi6DOTFcjUIVhsVCsWiFTirGk\n +dVDO42aF9VJ1ecEUeSlMRns3Yt1f7MNuxNUlkGeCWRzs4U+fq1DwZTz7hkSa4L5fEh6dCM5Eet\n BNqLmtR4=","X-Gm-Gg":"AeBDieuxwa9uY0SeCzIsWnQ/N8C64MClHc+N2vcgnqPD1iguUAN7XW8x6Ru+Z2PuYoY\n foMImPNNd9mgIFrwrPloM5xex8OpVdtrGggRLqeAx/kv0woOcNIgGtxQy1PJRVnJAzopm36aKH1\n Wtj6boOXjRELG1tGdYbhsNDNLEQNus8wspcIvYLi3soFnVL6X53dLP2A3+FdQkZYIsks0C5jQC+\n KrfEhkNMXNPEp/eoliZw31BpL+kk+ua9mVk5rBS9dMRg8D+/zRT2XE9ukZxlQPWeEnxruhGaYBF\n 2A60DX9pZG3bhslnnWa8cXzvC2wF69rQTrNbJvnK/wKXBObpu8iLbTotbA2fQ79DLjDDcZotEXx\n SdjgtIQfzIay+9aOsLKObhs0lOcKwPTaGKbgF0l3VXSFrjouSMohLaBg1dZw6E4FSgdxR1FoyOb\n UiN3XpBE4pWspk3YdFO9y//KnXwCzZMV6TcED4O0VbBKEWDgVSF04AJpm7W+TgkcsD4s4aAeI4+\n iPJrZiiZhQ=","X-Received":"by 2002:a05:600c:4e8f:b0:489:1fa5:997f with SMTP id\n 5b1f17b1804b1-4891fa59adfmr296331575e9.9.1777027407697;\n Fri, 24 Apr 2026 03:43:27 -0700 (PDT)","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","To":"qemu-devel@nongnu.org","Cc":"Eric Farman , qemu-s390x@nongnu.org,\n Richard Henderson ,\n David Hildenbrand ,\n Matthew Rosato ,\n Ilya Leoshkevich , Cornelia Huck ,\n\t=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Subject":"[PATCH v3] target/s390x: Leverage 128-bit vector type in V{L,\n ST}L opcodes","Date":"Fri, 24 Apr 2026 12:43:25 +0200","Message-ID":"<20260424104325.81484-1-philmd@linaro.org>","X-Mailer":"git-send-email 2.53.0","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::330;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"The access is unaligned (MO_UNALN), we can easily replace the 2\nconsecutive 64-bit calls by a single 128-bit one.\nConsidering atomicity of the new 128-bit access, the both opcodes\nVLL (Vector Load with Length) and VSTL (Vector STore with Length)\naccess byte granularity, so use MO_ATOM_NONE.\n\nSigned-off-by: Philippe Mathieu-Daudé \n---\nBased-on: <20260423135035.50126-1-philmd@linaro.org>\n\nv3:\n- do not increase addr (Ilya)\n- MO_ATOM_NONE (Richard)\n---\n target/s390x/tcg/vec.h | 12 ++++++++++++\n target/s390x/tcg/vec_helper.c | 17 ++++++-----------\n 2 files changed, 18 insertions(+), 11 deletions(-)","diff":"diff --git a/target/s390x/tcg/vec.h b/target/s390x/tcg/vec.h\nindex 8d095efcfc6..34413f7e029 100644\n--- a/target/s390x/tcg/vec.h\n+++ b/target/s390x/tcg/vec.h\n@@ -13,8 +13,10 @@\n #define S390X_VEC_H\n \n #include \"tcg/tcg.h\"\n+#include \"qemu/int128.h\"\n \n typedef union S390Vector {\n+ Int128 quadword;\n uint64_t doubleword[2];\n uint32_t word[4];\n uint16_t halfword[8];\n@@ -72,6 +74,11 @@ static inline uint64_t s390_vec_read_element64(const S390Vector *v, uint8_t enr)\n return v->doubleword[enr];\n }\n \n+static inline Int128 s390_vec_read_element128(const S390Vector *v)\n+{\n+ return v->quadword;\n+}\n+\n static inline uint64_t s390_vec_read_element(const S390Vector *v, uint8_t enr,\n uint8_t es)\n {\n@@ -117,6 +124,11 @@ static inline void s390_vec_write_element64(S390Vector *v, uint8_t enr,\n v->doubleword[enr] = data;\n }\n \n+static inline void s390_vec_write_element128(S390Vector *v, Int128 data)\n+{\n+ v->quadword = data;\n+}\n+\n static inline void s390_vec_write_element(S390Vector *v, uint8_t enr,\n uint8_t es, uint64_t data)\n {\ndiff --git a/target/s390x/tcg/vec_helper.c b/target/s390x/tcg/vec_helper.c\nindex 98eecd9fde6..a86819f61b6 100644\n--- a/target/s390x/tcg/vec_helper.c\n+++ b/target/s390x/tcg/vec_helper.c\n@@ -48,14 +48,11 @@ void HELPER(vll)(CPUS390XState *env, void *v1, uint64_t addr, uint64_t bytes)\n MemOpIdx oi;\n \n if (likely(bytes >= 16)) {\n- uint64_t t0, t1;\n+ Int128 t;\n \n- oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);\n- t0 = cpu_ldq_mmu(env, addr, oi, ra);\n- addr = wrap_address(env, addr + 8);\n- t1 = cpu_ldq_mmu(env, addr, oi, ra);\n- s390_vec_write_element64(v1, 0, t0);\n- s390_vec_write_element64(v1, 1, t1);\n+ oi = make_memop_idx(MO_128 | MO_UNALN | MO_ATOM_NONE | MO_BE, mmu_idx);\n+ t = cpu_ld16_mmu(env, addr, oi, ra);\n+ s390_vec_write_element128(v1, t);\n } else {\n S390Vector tmp = {};\n \n@@ -206,10 +203,8 @@ void HELPER(vstl)(CPUS390XState *env, const void *v1, uint64_t addr,\n probe_write_access(env, addr, MIN(bytes, 16), GETPC());\n \n if (likely(bytes >= 16)) {\n- oi = make_memop_idx(MO_BE | MO_64 | MO_UNALN, mmu_idx);\n- cpu_stq_mmu(env, addr, s390_vec_read_element64(v1, 0), oi, ra);\n- addr = wrap_address(env, addr + 8);\n- cpu_stq_mmu(env, addr, s390_vec_read_element64(v1, 1), oi, ra);\n+ oi = make_memop_idx(MO_128 | MO_UNALN | MO_ATOM_NONE | MO_BE, mmu_idx);\n+ cpu_st16_mmu(env, addr, s390_vec_read_element128(v1), oi, ra);\n } else {\n oi = make_memop_idx(MO_8, mmu_idx);\n \n","prefixes":["v3"]}