{"id":2227824,"url":"http://patchwork.ozlabs.org/api/patches/2227824/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424102800.24022-2-frank.chang@sifive.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260424102800.24022-2-frank.chang@sifive.com>","list_archive_url":null,"date":"2026-04-24T10:27:57","name":"[1/4] target/riscv: Add Zicclsm CPU option","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d3763d2338a211e5d4945eb25608156ff139389d","submitter":{"id":79604,"url":"http://patchwork.ozlabs.org/api/people/79604/?format=json","name":"Frank Chang","email":"frank.chang@sifive.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424102800.24022-2-frank.chang@sifive.com/mbox/","series":[{"id":501338,"url":"http://patchwork.ozlabs.org/api/series/501338/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501338","date":"2026-04-24T10:27:56","name":"Support the true Zicclsm extension","version":1,"mbox":"http://patchwork.ozlabs.org/series/501338/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227824/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227824/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=sifive.com header.i=@sifive.com header.a=rsa-sha256\n header.s=google header.b=N4Fzg27l;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pl1-x629.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Frank Chang \n\nAdd Zicclsm CPU option so that user can turn on/off misaligned loads\nand stores support.\n\nSigned-off-by: Frank Chang \nReviewed-by: Max Chou \n---\n target/riscv/cpu.c | 2 +-\n target/riscv/cpu_cfg_fields.h.inc | 2 ++\n 2 files changed, 3 insertions(+), 1 deletion(-)","diff":"diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c\nindex ce15a17c37d..df56b64a736 100644\n--- a/target/riscv/cpu.c\n+++ b/target/riscv/cpu.c\n@@ -127,7 +127,7 @@ const RISCVIsaExtData isa_edata_arr[] = {\n ISA_EXT_DATA_ENTRY(zicboz, PRIV_VERSION_1_12_0, ext_zicboz),\n ISA_EXT_DATA_ENTRY(ziccamoa, PRIV_VERSION_1_11_0, has_priv_1_11),\n ISA_EXT_DATA_ENTRY(ziccif, PRIV_VERSION_1_11_0, has_priv_1_11),\n- ISA_EXT_DATA_ENTRY(zicclsm, PRIV_VERSION_1_11_0, has_priv_1_11),\n+ ISA_EXT_DATA_ENTRY(zicclsm, PRIV_VERSION_1_11_0, ext_zicclsm),\n ISA_EXT_DATA_ENTRY(ziccrse, PRIV_VERSION_1_11_0, ext_ziccrse),\n ISA_EXT_DATA_ENTRY(zicfilp, PRIV_VERSION_1_12_0, ext_zicfilp),\n ISA_EXT_DATA_ENTRY(zicfiss, PRIV_VERSION_1_13_0, ext_zicfiss),\ndiff --git a/target/riscv/cpu_cfg_fields.h.inc b/target/riscv/cpu_cfg_fields.h.inc\nindex 734fa079f28..fc55dc6d892 100644\n--- a/target/riscv/cpu_cfg_fields.h.inc\n+++ b/target/riscv/cpu_cfg_fields.h.inc\n@@ -139,6 +139,8 @@ BOOL_FIELD(has_priv_1_11)\n /* Always enabled for TCG if has_priv_1_11 */\n BOOL_FIELD(ext_ziccrse)\n \n+BOOL_FIELD(ext_zicclsm)\n+\n /* Vendor-specific custom extensions */\n BOOL_FIELD(ext_xtheadba)\n BOOL_FIELD(ext_xtheadbb)\n","prefixes":["1/4"]}