{"id":2227822,"url":"http://patchwork.ozlabs.org/api/patches/2227822/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424102800.24022-3-frank.chang@sifive.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260424102800.24022-3-frank.chang@sifive.com>","list_archive_url":null,"date":"2026-04-24T10:27:58","name":"[2/4] target/riscv: Support raising misaligned exceptions for scalar loads/stores","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"194e9c0947a0fd114af6fbfe8fd8e118629954f0","submitter":{"id":79604,"url":"http://patchwork.ozlabs.org/api/people/79604/?format=json","name":"Frank Chang","email":"frank.chang@sifive.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424102800.24022-3-frank.chang@sifive.com/mbox/","series":[{"id":501338,"url":"http://patchwork.ozlabs.org/api/series/501338/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501338","date":"2026-04-24T10:27:56","name":"Support the true Zicclsm extension","version":1,"mbox":"http://patchwork.ozlabs.org/series/501338/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227822/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227822/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=sifive.com header.i=@sifive.com header.a=rsa-sha256\n header.s=google header.b=IRPiZdws;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g28Mg42SNz1xvV\n\tfor ; Fri, 24 Apr 2026 20:29:19 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGDlh-0005Ny-St; Fri, 24 Apr 2026 06:28:17 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wGDle-0005Mu-9z\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 06:28:15 -0400","from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wGDlc-0006Pa-QT\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 06:28:14 -0400","by mail-pl1-x632.google.com with SMTP id\n d9443c01a7336-2b25cf1b5f0so42614175ad.3\n for ; Fri, 24 Apr 2026 03:28:12 -0700 (PDT)","from hsinchu16.internal.sifive.com ([210.176.154.34])\n by smtp.gmail.com with ESMTPSA id\n d9443c01a7336-2b5fab0c17esm218889585ad.41.2026.04.24.03.28.08\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 24 Apr 2026 03:28:10 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=sifive.com; s=google; t=1777026491; x=1777631291; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=pSw8kImgt+V5S5xBZme5dHEoqer3BY93L/cOLcV0R+Q=;\n b=IRPiZdwsxVV9LnGoDcDhg/zLbFk67nktZe6XPDv/+aYhnEvU3Rnw16psiUMMt+H2co\n nAjeOiwvglnpeA1kr/rmnZUWY1SN9HU1296seRaNZsz/diSFZTEZ3vBRNEpy2wJNbv6B\n 0gYwvTTtBUoCOkYVD+1nVhIRLTagRPmeu3DeDapHN3g/CwuKndTiVz3AKQhEjAewyJZ3\n EJkESIKoGjKwR6x0ujB106eaugVkslaixuhB87wgzP0h+GPA2RkHvGajl2fqxg6GY3CU\n pKARNMcvy5zG5MqTuBoKdXh62DzsukHPq262NLwEei6NosCVeRFJXBqXC/1mlWbu7vDm\n lBjw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777026491; x=1777631291;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=pSw8kImgt+V5S5xBZme5dHEoqer3BY93L/cOLcV0R+Q=;\n b=cGHrVD9thTNu8+flHsl0e6E4wGdvLTJoXZkarmjNFdbi1//hvaiKKSv4BHu5xYS2vM\n QM+0KUQ3ZwnluhPWbQUKJwd3oylsR/zGVoj6+U6BJRB8YOI9oKrw4jyho2UvybXuS1o9\n DgSxE2valvOMm6J4m6BuokIgFb3KHkYCvIQ8ar5jtMONxbAKjzO+eGx3PBbwhkaeU1xd\n 3kMnfZQOim6iFkNMMfFTcQmD7sLCPjxswPnBqd4iS/36QA5bl1Z9oufaBCAvZhs9sKyA\n V7KBhZ5rueRjyYQma0IdSJc2Ya+kBTmjFewMmpov+s+PzhPtS7mPf0RKyqYImsfJNWv0\n xS1g==","X-Gm-Message-State":"AOJu0YxxBctltA5dHYXutzG+q1ohvS6EUrZ6d6R6Ug/9zdXLljcQQPtS\n Pu9/LlWSbYSvq9mhqNnHstIiL+hLLU/sWm4AVTzld7djgz46NwstaE7bCwR3o1G1dfJ2gq68GSB\n d+CQ83CHjnzF7s07hDsBSg37sbrbgXSlqhYCWd7dN2ykhwIpt8t6XXmAtzsVMtUNKIvF40cJ4aa\n mRHJ3ObCSz+u5A18pdD5eipNcyqK197/enrXuBbiwA1Ai1kKfC","X-Gm-Gg":"AeBDievUB7k2eRpMLJEBIHBOdcwf8qlKLL1AQM4u99OKN9Fg5zDgS7C/SssgT3s4CCF\n A9Qr/jJfe9C49K9tFAuNmdJkqCcPI4yag0e1GdhpB6YZVZGDn6ZKGj+x9KgdplbLD6QG4QI6n7a\n 4D3avAIPTmhWLOaJu+Q1BJIaZEpJZLw3lAMh7dl0LlZrWIVfxN15qW3LQq8r0zxi2oH2TpxnobW\n 26eyjNte5RZB18Gcmghw63pGh+taIdluDUFZFuxnC5YS13tUeui99zbknwckN3JfXTQArXafv6n\n +E+qyBy4OXk19sZLcavP2sW3fNNfiqSPwMLU6/u4tT9+gBfiV2c7P9bIOk6X0Y9l60S0huLtUJ8\n pfhQklq5KhJCAlCNKestpC0EI3vlh6YrOiArZ1i4YldWSum8HpVHcaxxnamxY3hKPdJkn9D/PAT\n eIZogoWU++bCFwALL8rdblvPr79IYrRCQcuPkz/Qk0Tdb4w3SLQ1B35UBTupte","X-Received":"by 2002:a17:903:2291:b0:2b4:678c:5f27 with SMTP id\n d9443c01a7336-2b5f9f3c5cbmr339255175ad.34.1777026490702;\n Fri, 24 Apr 2026 03:28:10 -0700 (PDT)","From":"frank.chang@sifive.com","To":"qemu-devel@nongnu.org","Cc":"Palmer Dabbelt ,\n Alistair Francis ,\n Weiwei Li ,\n Daniel Henrique Barboza ,\n Liu Zhiwei ,\n Chao Liu ,\n qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs),\n Frank Chang , Max Chou ","Subject":"[PATCH 2/4] target/riscv: Support raising misaligned exceptions for\n scalar loads/stores","Date":"Fri, 24 Apr 2026 18:27:58 +0800","Message-ID":"<20260424102800.24022-3-frank.chang@sifive.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260424102800.24022-1-frank.chang@sifive.com>","References":"<20260424102800.24022-1-frank.chang@sifive.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2607:f8b0:4864:20::632;\n envelope-from=frank.chang@sifive.com; helo=mail-pl1-x632.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Frank Chang \n\nWhen the Zicclsm extension is not enabled, raise misaligned load/store\nexceptions for misaligned accesses from scalar load/store instructions.\n\nSigned-off-by: Frank Chang \nReviewed-by: Max Chou \n---\n target/riscv/insn_trans/trans_rvi.c.inc | 6 ++++++\n 1 file changed, 6 insertions(+)","diff":"diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_trans/trans_rvi.c.inc\nindex 2c82ae41a77..2662fc5c2a2 100644\n--- a/target/riscv/insn_trans/trans_rvi.c.inc\n+++ b/target/riscv/insn_trans/trans_rvi.c.inc\n@@ -413,6 +413,9 @@ static bool gen_load(DisasContext *ctx, arg_lb *a, MemOp memop)\n if (ctx->cfg_ptr->ext_zama16b) {\n memop |= MO_ATOM_WITHIN16;\n }\n+ if (!ctx->cfg_ptr->ext_zicclsm) {\n+ memop |= MO_ALIGN;\n+ }\n decode_save_opc(ctx, 0);\n if (get_xl(ctx) == MXL_RV128) {\n out = gen_load_i128(ctx, a, memop);\n@@ -524,6 +527,9 @@ static bool gen_store(DisasContext *ctx, arg_sb *a, MemOp memop)\n if (ctx->cfg_ptr->ext_zama16b) {\n memop |= MO_ATOM_WITHIN16;\n }\n+ if (!ctx->cfg_ptr->ext_zicclsm) {\n+ memop |= MO_ALIGN;\n+ }\n decode_save_opc(ctx, 0);\n if (get_xl(ctx) == MXL_RV128) {\n return gen_store_i128(ctx, a, memop);\n","prefixes":["2/4"]}