{"id":2227695,"url":"http://patchwork.ozlabs.org/api/patches/2227695/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424043014.46305-15-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260424043014.46305-15-richard.henderson@linaro.org>","list_archive_url":null,"date":"2026-04-24T04:29:48","name":"[v2,14/40] target/arm: Enable FEAT_FPMR for -cpu max","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a11c08953823f199f1d88ce0b14afbd3a6ee0fb1","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424043014.46305-15-richard.henderson@linaro.org/mbox/","series":[{"id":501300,"url":"http://patchwork.ozlabs.org/api/series/501300/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501300","date":"2026-04-24T04:29:37","name":"target/arm: Implement FEAT_FP8","version":2,"mbox":"http://patchwork.ozlabs.org/series/501300/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227695/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227695/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=Ms4UiT5S;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g20X841Xkz1yD5\n\tfor ; Fri, 24 Apr 2026 14:36:08 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wG8Cd-0007WC-7R; Fri, 24 Apr 2026 00:31:43 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wG8CL-00072i-2y\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 00:31:30 -0400","from mail-ot1-x334.google.com ([2607:f8b0:4864:20::334])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wG8CI-0002pa-Us\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 00:31:24 -0400","by mail-ot1-x334.google.com with SMTP id\n 46e09a7af769-7d1872504cbso6281511a34.0\n for ; Thu, 23 Apr 2026 21:31:22 -0700 (PDT)","from stoup.. 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helo=mail-ot1-x334.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Richard Henderson \n---\n target/arm/tcg/cpu64.c | 4 ++++\n docs/system/arm/emulation.rst | 1 +\n 2 files changed, 5 insertions(+)","diff":"diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c\nindex 343536523a..40ed799fb8 100644\n--- a/target/arm/tcg/cpu64.c\n+++ b/target/arm/tcg/cpu64.c\n@@ -1287,6 +1287,10 @@ void aarch64_max_tcg_initfn(Object *obj)\n t = FIELD_DP64(t, ID_AA64PFR1, GCS, 1); /* FEAT_GCS */\n SET_IDREG(isar, ID_AA64PFR1, t);\n \n+ t = GET_IDREG(isar, ID_AA64PFR2);\n+ t = FIELD_DP64(t, ID_AA64PFR2, FPMR, 1); /* FEAT_FPMR */\n+ SET_IDREG(isar, ID_AA64PFR2, t);\n+\n t = GET_IDREG(isar, ID_AA64MMFR0);\n t = FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */\n t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 1); /* 16k pages supported */\ndiff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst\nindex 579df4c47b..fda73d3d07 100644\n--- a/docs/system/arm/emulation.rst\n+++ b/docs/system/arm/emulation.rst\n@@ -75,6 +75,7 @@ the following architecture extensions:\n - FEAT_FPAC (Faulting on AUT* instructions)\n - FEAT_FPACCOMBINE (Faulting on combined pointer authentication instructions)\n - FEAT_FPACC_SPEC (Speculative behavior of combined pointer authentication instructions)\n+- FEAT_FPMR (Floating-point mode register)\n - FEAT_FRINTTS (Floating-point to integer instructions)\n - FEAT_FlagM (Flag manipulation instructions v2)\n - FEAT_FlagM2 (Enhancements to flag manipulation instructions)\n","prefixes":["v2","14/40"]}