{"id":2227608,"url":"http://patchwork.ozlabs.org/api/patches/2227608/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424023606.2556830-4-brian.cain@oss.qualcomm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260424023606.2556830-4-brian.cain@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-24T02:36:00","name":"[PULL,3/9] Hexagon (target/hexagon) Add Hexagon definition field to DisasContext","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"43d0b64fafeba854121aa6eb46344a2b3b98712a","submitter":{"id":89839,"url":"http://patchwork.ozlabs.org/api/people/89839/?format=json","name":"Brian Cain","email":"brian.cain@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424023606.2556830-4-brian.cain@oss.qualcomm.com/mbox/","series":[{"id":501280,"url":"http://patchwork.ozlabs.org/api/series/501280/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501280","date":"2026-04-24T02:36:05","name":"[PULL,1/9] Hexagon (target/hexagon) Properly handle Hexagon CPU version","version":1,"mbox":"http://patchwork.ozlabs.org/series/501280/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227608/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227608/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=Djjza6PN;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=jdcOSEsN;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mx0b-0031df01.pphosted.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Taylor Simpson \n\nInitialize the field in hexagon_tr_init_disas_context\n\nCo-authored-by: Matheus Tavares Bernardino \nCo-authored-by: Brian Cain \nSigned-off-by: Taylor Simpson \nReviewed-by: Anton Johansson \nSigned-off-by: Brian Cain \n---\n target/hexagon/translate.h | 1 +\n target/hexagon/translate.c | 1 +\n 2 files changed, 2 insertions(+)","diff":"diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h\nindex b37cb492381..9cdcbd64164 100644\n--- a/target/hexagon/translate.h\n+++ b/target/hexagon/translate.h\n@@ -30,6 +30,7 @@ typedef struct DisasContext {\n DisasContextBase base;\n Packet *pkt;\n Insn *insn;\n+ const HexagonCPUDef *hex_def;\n uint32_t next_PC;\n uint32_t mem_idx;\n uint32_t num_packets;\ndiff --git a/target/hexagon/translate.c b/target/hexagon/translate.c\nindex 633401451d8..12c82fd6c5a 100644\n--- a/target/hexagon/translate.c\n+++ b/target/hexagon/translate.c\n@@ -988,6 +988,7 @@ static void hexagon_tr_init_disas_context(DisasContextBase *dcbase,\n ctx->branch_cond = TCG_COND_NEVER;\n ctx->is_tight_loop = FIELD_EX32(hex_flags, TB_FLAGS, IS_TIGHT_LOOP);\n ctx->short_circuit = hex_cpu->short_circuit;\n+ ctx->hex_def = HEXAGON_CPU_GET_CLASS(hex_cpu)->hex_def;\n }\n \n static void hexagon_tr_tb_start(DisasContextBase *db, CPUState *cpu)\n","prefixes":["PULL","3/9"]}