{"id":2227604,"url":"http://patchwork.ozlabs.org/api/patches/2227604/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424023606.2556830-2-brian.cain@oss.qualcomm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260424023606.2556830-2-brian.cain@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-24T02:35:58","name":"[PULL,1/9] Hexagon (target/hexagon) Properly handle Hexagon CPU version","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8fd83fb43796f481e7e57904a8279947ce594885","submitter":{"id":89839,"url":"http://patchwork.ozlabs.org/api/people/89839/?format=json","name":"Brian Cain","email":"brian.cain@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424023606.2556830-2-brian.cain@oss.qualcomm.com/mbox/","series":[{"id":501280,"url":"http://patchwork.ozlabs.org/api/series/501280/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501280","date":"2026-04-24T02:36:05","name":"[PULL,1/9] Hexagon (target/hexagon) Properly handle Hexagon CPU version","version":1,"mbox":"http://patchwork.ozlabs.org/series/501280/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227604/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227604/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=eN7x2Cxn;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=LzZL9G2o;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1xvL53gMz1y2d\n\tfor ; Fri, 24 Apr 2026 12:37:34 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wG6P2-0006jy-LI; Thu, 23 Apr 2026 22:36:24 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wG6P0-0006jT-QL\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 22:36:22 -0400","from mx0a-0031df01.pphosted.com ([205.220.168.131])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wG6Oy-0008I2-Km\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 22:36:22 -0400","from pps.filterd (m0279863.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63O0UiEK154571\n for ; Fri, 24 Apr 2026 02:36:18 GMT","from mail-dy1-f197.google.com (mail-dy1-f197.google.com\n [74.125.82.197])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dqpf629gd-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for ; Fri, 24 Apr 2026 02:36:18 +0000 (GMT)","by mail-dy1-f197.google.com with SMTP id\n 5a478bee46e88-2e60238adb1so16086473eec.0\n for ; Thu, 23 Apr 2026 19:36:18 -0700 (PDT)","from hu-bcain-lv.qualcomm.com (Global_NAT1.qualcomm.com.\n [129.46.96.20]) by smtp.gmail.com with ESMTPSA id\n 5a478bee46e88-2e539fa6134sm31240868eec.3.2026.04.23.19.36.16\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Thu, 23 Apr 2026 19:36:16 -0700 (PDT)"],"DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n cc:content-transfer-encoding:content-type:date:from:in-reply-to\n :message-id:mime-version:references:subject:to; s=qcppdkim1; bh=\n oByYefPobt+hcemOQ65toT/WbilTH5wPecxvjLplOqQ=; b=eN7x2Cxn2DsKTSk7\n lp7Xr7MTuU4vnmtNdeDfeidbKsBz1Uq0ApjIfgCxfkQUh2H9dnbhHsu56q/2ROnV\n W+DwCcexSkh1CFy4LIQuzvTar2KIneMyeuVNj5Mw9+Grp9QMHPcnYB2/UwZC+zRT\n W7g3FWiihSgftYpS5EpSkxmjtZLibpFAcMTTvF3wI4DZDW84BLY4KwRkhC6ocsx9\n 5ckSiDLGMtKflfnYkZv9I/E8koXv11oo8L9hK9fLh6Q5TkMrQFN0K7Jg8yctwPjv\n 7Bl4IKD5nj2rhig6nnBexrtNyOSevR9T+x17hhPJgLX2/bFMoIekyW7QWxRBhINg\n OKEHaA==","v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=oss.qualcomm.com; s=google; t=1776998178; x=1777602978; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=oByYefPobt+hcemOQ65toT/WbilTH5wPecxvjLplOqQ=;\n b=LzZL9G2oU4Q7Y0vS4kMkb9UEmTlxo/ClQq1BUtoyERDDJjiRcls3iFE9c4Qvg+euiF\n 5xrPxXVtz0Adbp5QCPhemXP4KwyF+jCWFiWQkhsH1XVUJGDRllqbqiqVCHYoIlOvJErq\n ER708qhujYZ9/y2hoMwVbmzGLopyBVRMVNsUMQhJ4h8oh8Qo2EXMuiDiMDQyhfqj+tvc\n GnDPHApwyyJ7Zxvue2uPrzNBqJnnlW2xEtrdE01N5bYZqWrf9Zugu9DjaVicwIMuLEeH\n IcqGx0ME/1wn+eqGVIxPRNCI+5VLYs3hcVSHkbfwsDA8hDOcJE9UTHvoVekBA6DSefi6\n 2Zeg=="],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776998178; x=1777602978;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=oByYefPobt+hcemOQ65toT/WbilTH5wPecxvjLplOqQ=;\n b=J9CuCTRfPsblvSUFkTadneBg5X67Ike8fPe/WTrhDzyD4DFyZdgo33QGXJVT474zhA\n 76Lzfu+WQZx1gmx7XXs39oGiEvN6cQsuW61oTDpD3fyxAmJa6pRC9QBbaRUXBur0jEuL\n QgvjUXqmgLIEFl28M5cjjYrZGYrFKdoPHrmiiC8QiBTSbqmHxIhKNVJT78de9iD2/1Yf\n dmVT/jOhpFdkpN5dEfb6EtOcX/N01xIFr3tUDEtca1yEoOgD8SmCHzoO/SA7N3zQfMWt\n tRKFJLhabsEGLs1YIu5QbCxs4W+JQOhh7r2h5lV4tPOpR8lHe91E6IbjXbUMcOUp77Gz\n z0HA==","X-Gm-Message-State":"AOJu0YykmW1qkyKCzl5SNDVs2wtSfqCRKQh2ZhrklYhgMzrBUiccDhqY\n FB6ssWeLc2uhTVwbDQUI+GGYMxtjzIiA4ykvyw3GHeMQlkhpZyiRDiY/l9/+MzUDMJM+nYZw5T4\n BYiTlvMzHMGUTTiFanABMw1dXOKMrRETtm0DLRS1MN9Rz6XQq43zFEOx15Oipujeijg==","X-Gm-Gg":"AeBDieuF53mYCH9gfbix8TV1+k7YsrKmgWGTjPjupa4QzO74KTZtD+4XEn6v+WGmQyN\n 3FB/aavizAtHhj95JUzv/+ju7ai52pAGgxt019bmqhEolb2ZNTSrdVpp9N+P1m9mvSLwg7MXM23\n S34zo/tufU2aVNhMpIDh5A0fhNJlPa/qQaKR879OEzHxKVOnStychMPItHumg8PaEqHbFamwopX\n uHMvv9U/CJMoVunvHIG3vKVFHdIAKZSADJWFRp68oNzkhf6i5nQ3/Nn+D1jH6YMZMlwce3yObL3\n 13LUodWKNqQdplWpYq+RTtfqizQDc+yuf55ZSTS29allK+gkP1rrtK9Naz2jpqDojdQ4IwWMJi0\n spNAOZ86P9QdQtD703+/vazdLsRA22S+OFLiuexdRr1JzXQR1b61qblLL0AjdliesKN7/vtxWpf\n /dk4Ir","X-Received":["by 2002:a05:7301:6587:b0:2ea:6361:8981 with SMTP id\n 5a478bee46e88-2ea63618b8bmr10546376eec.22.1776998177775;\n Thu, 23 Apr 2026 19:36:17 -0700 (PDT)","by 2002:a05:7301:6587:b0:2ea:6361:8981 with SMTP id\n 5a478bee46e88-2ea63618b8bmr10546365eec.22.1776998177258;\n Thu, 23 Apr 2026 19:36:17 -0700 (PDT)"],"From":"Brian Cain ","To":"qemu-devel@nongnu.org, stefanha@redhat.com","Cc":"brian.cain@oss.qualcomm.com, Taylor Simpson ,\n Matheus Tavares Bernardino ,\n Anton Johansson ,\n Pierrick Bouvier ","Subject":"[PULL 1/9] Hexagon (target/hexagon) Properly handle Hexagon CPU\n version","Date":"Thu, 23 Apr 2026 19:35:58 -0700","Message-Id":"<20260424023606.2556830-2-brian.cain@oss.qualcomm.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260424023606.2556830-1-brian.cain@oss.qualcomm.com>","References":"<20260424023606.2556830-1-brian.cain@oss.qualcomm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","X-Authority-Analysis":"v=2.4 cv=Iocutr/g c=1 sm=1 tr=0 ts=69ead722 cx=c_pps\n a=Uww141gWH0fZj/3QKPojxA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22\n a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=kO7NYY--Zd9gfOQAb1oA:9 a=QEXdDO2ut3YA:10\n a=PxkB5W3o20Ba91AHUih5:22","X-Proofpoint-ORIG-GUID":"8tfChXzFOW5o3VhYfRu839aXxj8imIeQ","X-Proofpoint-GUID":"8tfChXzFOW5o3VhYfRu839aXxj8imIeQ","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDI0MDAyMCBTYWx0ZWRfX5rJey1EOLnhI\n 72OKajPPjSLuOh0u/Ld7/MnVtczpWdgN5LO8Ft9Ur1RyycsOzR85nri73CnprMJBGLa3TOdN+7m\n SN/5subbI7E0JpNd9il9L0iZDbEfBy+LKH7zjTYbeeMmgUUVzYCtx4kS1DJTA6iDc0pdWVjJiOf\n LW5WG6kUyAmEwbBP+grGdebZcvh/aE/9K4uLe1ENH1kkZe7Cwy2BhczCUfvWNDRiGWhRYBSSnrS\n AXRmBby2n9QHPNUOP94wL6/KB4iTllc1vmve1GjTBXaF5c/AmiUQkhisxTkQDMCVRhskSGEkl+i\n Stx6JbAPdtQCD0oPqg4q286resLdBZudhxY+TQEhoF45mE2MuITRZruZ/CxarM30bfExsa/66zJ\n CRi44Zev27CrqmhDE7scMR4FW8Up8vuPrGKQxBf7xz6eZRFbs/0JFeiBFzGWSHqg2Wdcjtu3PJ+\n 5X0bYaKgUUywVHqUbMA==","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-23_03,2026-04-21_02,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n adultscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0\n suspectscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015\n impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000\n definitions=main-2604240020","Received-SPF":"pass client-ip=205.220.168.131;\n envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Taylor Simpson \n\nAdd the following CPU versions that were previously missing\n v5\n v55\n v60\n v61\n v62\n v65\n\nCreate a CPUHexagonDef struct to represent the definition of a core\n Currently contains an enum with the known Hexagon CPU versions\nAdd a field to HexagonCPUClass to note the Hexagon definition\n\nCo-authored-by: Matheus Tavares Bernardino \nCo-authored-by: Brian Cain \nSigned-off-by: Taylor Simpson \nReviewed-by: Anton Johansson \nSigned-off-by: Brian Cain \n---\n target/hexagon/cpu-qom.h | 27 +++++++++++++++++++++++\n target/hexagon/cpu.h | 2 ++\n target/hexagon/cpu.c | 46 ++++++++++++++++++++++++----------------\n 3 files changed, 57 insertions(+), 18 deletions(-)","diff":"diff --git a/target/hexagon/cpu-qom.h b/target/hexagon/cpu-qom.h\nindex 0b149bd5fea..6e1bb040704 100644\n--- a/target/hexagon/cpu-qom.h\n+++ b/target/hexagon/cpu-qom.h\n@@ -11,11 +11,38 @@\n \n #include \"hw/core/cpu.h\"\n \n+typedef enum {\n+ HEX_VER_NONE = 0x00,\n+ HEX_VER_V5 = 0x04,\n+ HEX_VER_V55 = 0x05,\n+ HEX_VER_V60 = 0x60,\n+ HEX_VER_V61 = 0x61,\n+ HEX_VER_V62 = 0x62,\n+ HEX_VER_V65 = 0x65,\n+ HEX_VER_V66 = 0x66,\n+ HEX_VER_V67 = 0x67,\n+ HEX_VER_V68 = 0x68,\n+ HEX_VER_V69 = 0x69,\n+ HEX_VER_V71 = 0x71,\n+ HEX_VER_V73 = 0x73,\n+ HEX_VER_ANY = 0xff,\n+} HexagonVersion;\n+\n+typedef struct {\n+ HexagonVersion hex_version;\n+} HexagonCPUDef;\n+\n #define TYPE_HEXAGON_CPU \"hexagon-cpu\"\n \n #define HEXAGON_CPU_TYPE_SUFFIX \"-\" TYPE_HEXAGON_CPU\n #define HEXAGON_CPU_TYPE_NAME(name) (name HEXAGON_CPU_TYPE_SUFFIX)\n \n+#define TYPE_HEXAGON_CPU_V5 HEXAGON_CPU_TYPE_NAME(\"v5\")\n+#define TYPE_HEXAGON_CPU_V55 HEXAGON_CPU_TYPE_NAME(\"v55\")\n+#define TYPE_HEXAGON_CPU_V60 HEXAGON_CPU_TYPE_NAME(\"v60\")\n+#define TYPE_HEXAGON_CPU_V61 HEXAGON_CPU_TYPE_NAME(\"v61\")\n+#define TYPE_HEXAGON_CPU_V62 HEXAGON_CPU_TYPE_NAME(\"v62\")\n+#define TYPE_HEXAGON_CPU_V65 HEXAGON_CPU_TYPE_NAME(\"v65\")\n #define TYPE_HEXAGON_CPU_V66 HEXAGON_CPU_TYPE_NAME(\"v66\")\n #define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME(\"v67\")\n #define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME(\"v68\")\ndiff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h\nindex 85afd592778..f99647dfb61 100644\n--- a/target/hexagon/cpu.h\n+++ b/target/hexagon/cpu.h\n@@ -117,6 +117,8 @@ typedef struct HexagonCPUClass {\n \n DeviceRealize parent_realize;\n ResettablePhases parent_phases;\n+\n+ const HexagonCPUDef *hex_def;\n } HexagonCPUClass;\n \n struct ArchCPU {\ndiff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c\nindex ffd14bb4678..23ac91e7b47 100644\n--- a/target/hexagon/cpu.c\n+++ b/target/hexagon/cpu.c\n@@ -27,13 +27,6 @@\n #include \"exec/gdbstub.h\"\n #include \"accel/tcg/cpu-ops.h\"\n \n-static void hexagon_v66_cpu_init(Object *obj) { }\n-static void hexagon_v67_cpu_init(Object *obj) { }\n-static void hexagon_v68_cpu_init(Object *obj) { }\n-static void hexagon_v69_cpu_init(Object *obj) { }\n-static void hexagon_v71_cpu_init(Object *obj) { }\n-static void hexagon_v73_cpu_init(Object *obj) { }\n-\n static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)\n {\n ObjectClass *oc;\n@@ -377,11 +370,21 @@ static void hexagon_cpu_class_init(ObjectClass *c, const void *data)\n cc->tcg_ops = &hexagon_tcg_ops;\n }\n \n-#define DEFINE_CPU(type_name, initfn) \\\n- { \\\n- .name = type_name, \\\n- .parent = TYPE_HEXAGON_CPU, \\\n- .instance_init = initfn \\\n+static void hexagon_cpu_class_base_init(ObjectClass *c, const void *data)\n+{\n+ HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c);\n+ /* Make sure all CPU models define a HexagonCPUDef */\n+ g_assert(!object_class_is_abstract(c) && data != NULL);\n+ mcc->hex_def = data;\n+}\n+\n+#define DEFINE_CPU(type_name, version) \\\n+ { \\\n+ .name = type_name, \\\n+ .parent = TYPE_HEXAGON_CPU, \\\n+ .class_data = &(const HexagonCPUDef) { \\\n+ .hex_version = version, \\\n+ } \\\n }\n \n static const TypeInfo hexagon_cpu_type_infos[] = {\n@@ -394,13 +397,20 @@ static const TypeInfo hexagon_cpu_type_infos[] = {\n .abstract = true,\n .class_size = sizeof(HexagonCPUClass),\n .class_init = hexagon_cpu_class_init,\n+ .class_base_init = hexagon_cpu_class_base_init,\n },\n- DEFINE_CPU(TYPE_HEXAGON_CPU_V66, hexagon_v66_cpu_init),\n- DEFINE_CPU(TYPE_HEXAGON_CPU_V67, hexagon_v67_cpu_init),\n- DEFINE_CPU(TYPE_HEXAGON_CPU_V68, hexagon_v68_cpu_init),\n- DEFINE_CPU(TYPE_HEXAGON_CPU_V69, hexagon_v69_cpu_init),\n- DEFINE_CPU(TYPE_HEXAGON_CPU_V71, hexagon_v71_cpu_init),\n- DEFINE_CPU(TYPE_HEXAGON_CPU_V73, hexagon_v73_cpu_init),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V5, HEX_VER_V5),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V55, HEX_VER_V55),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V60, HEX_VER_V60),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V61, HEX_VER_V61),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V62, HEX_VER_V62),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V65, HEX_VER_V65),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V66, HEX_VER_V66),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V67, HEX_VER_V67),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V68, HEX_VER_V68),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V69, HEX_VER_V69),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V71, HEX_VER_V71),\n+ DEFINE_CPU(TYPE_HEXAGON_CPU_V73, HEX_VER_V73),\n };\n \n DEFINE_TYPES(hexagon_cpu_type_infos)\n","prefixes":["PULL","1/9"]}