{"id":2227425,"url":"http://patchwork.ozlabs.org/api/patches/2227425/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260423170229.64655-12-philmd@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260423170229.64655-12-philmd@linaro.org>","list_archive_url":null,"date":"2026-04-23T17:02:23","name":"[11/16] target/arm: Only set CPU_INTERRUPT_EXITTB for TCG","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"3fd999a74ff83bc33750f669fa68f9a03fa82196","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260423170229.64655-12-philmd@linaro.org/mbox/","series":[{"id":501223,"url":"http://patchwork.ozlabs.org/api/series/501223/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501223","date":"2026-04-23T17:02:12","name":"accel/hvf: Assorted collection of patches queued before v11 release","version":1,"mbox":"http://patchwork.ozlabs.org/series/501223/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227425/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227425/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=io4xn7R/;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::435;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Commit 34c45d53026 (\"target-arm: kvm - re-inject guest debug\nexceptions\") removed CPU_INTERRUPT_EXITTB from KVM, but it\nalso appears on HVF. Better to restrict it to TCG.\n\nSuggested-by: Richard Henderson \nSigned-off-by: Philippe Mathieu-Daudé \nReviewed-by: Richard Henderson \nReviewed-by: Pierrick Bouvier \nMessage-Id: <20250630130937.3487-2-philmd@linaro.org>\n---\n target/arm/helper.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/target/arm/helper.c b/target/arm/helper.c\nindex 7389f2988c4..45183df4449 100644\n--- a/target/arm/helper.c\n+++ b/target/arm/helper.c\n@@ -9577,7 +9577,7 @@ void arm_cpu_do_interrupt(CPUState *cs)\n \n arm_call_el_change_hook(cpu);\n \n- if (!kvm_enabled()) {\n+ if (tcg_enabled()) {\n cpu_set_interrupt(cs, CPU_INTERRUPT_EXITTB);\n }\n \n","prefixes":["11/16"]}