{"id":2227107,"url":"http://patchwork.ozlabs.org/api/patches/2227107/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260423085718.70762-14-akhilrajeev@nvidia.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260423085718.70762-14-akhilrajeev@nvidia.com>","list_archive_url":null,"date":"2026-04-23T08:57:12","name":"[v3,13/13] arm64: defconfig: Enable I3C and SPD5118 hwmon","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"aceaff192c10f012bc14b8c3b8b507659e2380b2","submitter":{"id":81965,"url":"http://patchwork.ozlabs.org/api/people/81965/?format=json","name":"Akhil R","email":"akhilrajeev@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260423085718.70762-14-akhilrajeev@nvidia.com/mbox/","series":[{"id":501164,"url":"http://patchwork.ozlabs.org/api/series/501164/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=501164","date":"2026-04-23T08:56:59","name":"Support ACPI and SETAASA device discovery","version":3,"mbox":"http://patchwork.ozlabs.org/series/501164/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227107/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227107/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n 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sender) receiver=protection.outlook.com;\n client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C","From":"Akhil R ","To":"Alexandre Belloni , Frank Li\n\t, Rob Herring , Krzysztof Kozlowski\n\t, Conor Dooley , \"Rafael J .\n Wysocki\" , Saket Dumbre , \"Len\n Brown\" , Guenter Roeck , Philipp Zabel\n\t, Bjorn Andersson ,\n\tGeert Uytterhoeven , Dmitry Baryshkov\n\t, Arnd Bergmann , \"Eric\n Biggers\" , Wolfram Sang\n\t, Miquel Raynal\n\t, Jon Hunter , \"Thierry\n Reding\" , ,\n\t, ,\n\t, ,\n\t, ","CC":"Akhil R ","Subject":"[PATCH v3 13/13] arm64: defconfig: Enable I3C and SPD5118 hwmon","Date":"Thu, 23 Apr 2026 14:27:12 +0530","Message-ID":"<20260423085718.70762-14-akhilrajeev@nvidia.com>","X-Mailer":"git-send-email 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Apr 2026 09:01:08.8713\n (UTC)","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 255f800a-d019-49e1-07ae-08dea116dc46","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n\tCO1PEPF000075F0.namprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DM6PR12MB4235"},"content":"Enable I3C subsystem (I3C), Synopsys DesignWare I3C master controller\n(DW_I3C_MASTER), and SPD5118 hwmon temperature sensor (SENSORS_SPD5118)\nas modules.\n\nThe NVIDIA Vera CPU uses SOCAMM LPDDR5X memory module, which contain\nSPD5118 (JEDEC JESD300) compliant temperature sensor. This sensor is\naccessible over the I3C bus through the DesignWare I3C controller present\non the SoC. Enabling these configs allows monitoring memory module\ntemperatures on platforms such as Vera Rubin. Vera is an ACPI-based\nplatform and does not use device tree.\n\nSigned-off-by: Akhil R \n---\n arch/arm64/configs/defconfig | 3 +++\n 1 file changed, 3 insertions(+)","diff":"diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig\nindex dd1ac01ee29b..cc573c481c65 100644\n--- a/arch/arm64/configs/defconfig\n+++ b/arch/arm64/configs/defconfig\n@@ -588,6 +588,8 @@ CONFIG_I2C_UNIPHIER_F=y\n CONFIG_I2C_XILINX=m\n CONFIG_I2C_RCAR=y\n CONFIG_I2C_CROS_EC_TUNNEL=y\n+CONFIG_I3C=m\n+CONFIG_DW_I3C_MASTER=m\n CONFIG_SPI=y\n CONFIG_SPI_APPLE=m\n CONFIG_SPI_ARMADA_3700=y\n@@ -772,6 +774,7 @@ CONFIG_SENSORS_SL28CPLD=m\n CONFIG_SENSORS_AMC6821=m\n CONFIG_SENSORS_INA2XX=m\n CONFIG_SENSORS_INA3221=m\n+CONFIG_SENSORS_SPD5118=m\n CONFIG_SENSORS_TMP102=m\n CONFIG_MISC_RP1=m\n CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y\n","prefixes":["v3","13/13"]}