{"id":2227032,"url":"http://patchwork.ozlabs.org/api/patches/2227032/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260423-fix-eliza-pinctrl-v3-4-68b24893ae63@pm.me/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260423-fix-eliza-pinctrl-v3-4-68b24893ae63@pm.me>","list_archive_url":null,"date":"2026-04-23T04:43:46","name":"[v3,4/4] pinctrl: qcom: eliza: Split QUP1_SE4 lanes","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"36ca45a52ed0250476812ed4b99d2e701849619d","submitter":{"id":93184,"url":"http://patchwork.ozlabs.org/api/people/93184/?format=json","name":"Alexander Koskovich","email":"akoskovich@pm.me"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260423-fix-eliza-pinctrl-v3-4-68b24893ae63@pm.me/mbox/","series":[{"id":501143,"url":"http://patchwork.ozlabs.org/api/series/501143/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501143","date":"2026-04-23T04:43:19","name":"pinctrl: qcom: eliza: Split up some QUP function groups","version":3,"mbox":"http://patchwork.ozlabs.org/series/501143/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227032/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227032/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=pm.me header.i=@pm.me header.a=rsa-sha256\n header.s=protonmail3 header.b=NTkmatSH;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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charset=utf-8","Content-Transfer-Encoding":"quoted-printable"},"content":"QUP1_SE4 shares GPIO_36 & GPIO_37 for both L0/L1 and L3/L2 so the\nfunction name cannot be the same or the alternate function cannot\nbe selected.\n\nSplit them up into individual lane functions so boards can specify.\n\nSigned-off-by: Alexander Koskovich \n---\n drivers/pinctrl/qcom/pinctrl-eliza.c | 30 ++++++++++++++++++++++++------\n 1 file changed, 24 insertions(+), 6 deletions(-)","diff":"diff --git a/drivers/pinctrl/qcom/pinctrl-eliza.c b/drivers/pinctrl/qcom/pinctrl-eliza.c\nindex 8f74756771b8..40e263e35b45 100644\n--- a/drivers/pinctrl/qcom/pinctrl-eliza.c\n+++ b/drivers/pinctrl/qcom/pinctrl-eliza.c\n@@ -568,7 +568,10 @@ enum eliza_functions {\n \tmsm_mux_qup1_se2_l3_mira,\n \tmsm_mux_qup1_se2_l3_mirb,\n \tmsm_mux_qup1_se3,\n-\tmsm_mux_qup1_se4,\n+\tmsm_mux_qup1_se4_l0,\n+\tmsm_mux_qup1_se4_l1,\n+\tmsm_mux_qup1_se4_l2,\n+\tmsm_mux_qup1_se4_l3,\n \tmsm_mux_qup1_se5,\n \tmsm_mux_qup1_se6,\n \tmsm_mux_qup1_se6_l1_mira,\n@@ -1017,8 +1020,20 @@ static const char *const qup1_se3_groups[] = {\n \t\"gpio44\", \"gpio45\", \"gpio46\", \"gpio47\",\n };\n \n-static const char *const qup1_se4_groups[] = {\n-\t\"gpio36\", \"gpio37\", \"gpio37\", \"gpio36\",\n+static const char *const qup1_se4_l0_groups[] = {\n+\t\"gpio36\",\n+};\n+\n+static const char *const qup1_se4_l1_groups[] = {\n+\t\"gpio37\",\n+};\n+\n+static const char *const qup1_se4_l2_groups[] = {\n+\t\"gpio37\",\n+};\n+\n+static const char *const qup1_se4_l3_groups[] = {\n+\t\"gpio36\",\n };\n \n static const char *const qup1_se5_groups[] = {\n@@ -1321,7 +1336,10 @@ static const struct pinfunction eliza_functions[] = {\n \tMSM_PIN_FUNCTION(qup1_se2_l3_mira),\n \tMSM_PIN_FUNCTION(qup1_se2_l3_mirb),\n \tMSM_PIN_FUNCTION(qup1_se3),\n-\tMSM_PIN_FUNCTION(qup1_se4),\n+\tMSM_PIN_FUNCTION(qup1_se4_l0),\n+\tMSM_PIN_FUNCTION(qup1_se4_l1),\n+\tMSM_PIN_FUNCTION(qup1_se4_l2),\n+\tMSM_PIN_FUNCTION(qup1_se4_l3),\n \tMSM_PIN_FUNCTION(qup1_se5),\n \tMSM_PIN_FUNCTION(qup1_se6),\n \tMSM_PIN_FUNCTION(qup1_se6_l1_mira),\n@@ -1418,8 +1436,8 @@ static const struct msm_pingroup eliza_groups[] = {\n \t[33] = PINGROUP(33, qup1_se1, ibi_i3c, host2wlan_sol, gcc_gp3, _, _, _, _, _, _, _),\n \t[34] = PINGROUP(34, qup1_se1, qup1_se5, tb_trig_sdc1, ddr_bist_start, qdss_gpio_tracedata, _, _, _, _, _, _),\n \t[35] = PINGROUP(35, qup1_se1, qup1_se5, tb_trig_sdc2, gcc_gp2, qdss_gpio_tracedata, _, _, _, _, _, _),\n-\t[36] = PINGROUP(36, qup1_se4, qup1_se4, ibi_i3c, _, _, _, _, _, _, _, _),\n-\t[37] = PINGROUP(37, qup1_se4, qup1_se4, ibi_i3c, _, _, _, _, _, _, _, _),\n+\t[36] = PINGROUP(36, qup1_se4_l0, qup1_se4_l3, ibi_i3c, _, _, _, _, _, _, _, _),\n+\t[37] = PINGROUP(37, qup1_se4_l1, qup1_se4_l2, ibi_i3c, _, _, _, _, _, _, _, _),\n \t[38] = PINGROUP(38, _, _, _, _, _, _, _, _, _, _, _),\n \t[39] = PINGROUP(39, _, _, _, _, _, _, _, _, _, _, _),\n \t[40] = PINGROUP(40, qup1_se6, qup1_se2, qup1_se6_l3_mira, _, qdss_gpio_tracedata, gnss_adc1, ddr_pxi1, _, _, _, _),\n","prefixes":["v3","4/4"]}