{"id":2227028,"url":"http://patchwork.ozlabs.org/api/patches/2227028/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260423-fix-eliza-pinctrl-v3-1-68b24893ae63@pm.me/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260423-fix-eliza-pinctrl-v3-1-68b24893ae63@pm.me>","list_archive_url":null,"date":"2026-04-23T04:43:19","name":"[v3,1/4] dt-bindings: pinctrl: qcom,eliza-tlmm: Split QUP lane mirror alternates","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6bc966bdddafd1105bb453643ffc17cae2829205","submitter":{"id":93184,"url":"http://patchwork.ozlabs.org/api/people/93184/?format=json","name":"Alexander Koskovich","email":"akoskovich@pm.me"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260423-fix-eliza-pinctrl-v3-1-68b24893ae63@pm.me/mbox/","series":[{"id":501143,"url":"http://patchwork.ozlabs.org/api/series/501143/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501143","date":"2026-04-23T04:43:19","name":"pinctrl: qcom: eliza: Split up some QUP function groups","version":3,"mbox":"http://patchwork.ozlabs.org/series/501143/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227028/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227028/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=pm.me header.i=@pm.me header.a=rsa-sha256\n header.s=protonmail3 header.b=Upn6giTC;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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charset=utf-8","Content-Transfer-Encoding":"quoted-printable"},"content":"Several QUP lanes have MIRA/MIRB mirror routings that let the same lane\nbe muxed out on alternative GPIOs. On Eliza these were all collapsed\nunder the base function name (e.g. qup1_se6), which prevented boards\nfrom selecting the mirror variants.\n\nAdd explicit function names for each mirror lane, matching the pattern\nalready established by qcom,sm8550-tlmm and related bindings.\n\nSigned-off-by: Alexander Koskovich \n---\n .../bindings/pinctrl/qcom,eliza-tlmm.yaml | 25 +++++++++++++---------\n 1 file changed, 15 insertions(+), 10 deletions(-)","diff":"diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml\nindex 282650426487..be7b4680045f 100644\n--- a/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml\n+++ b/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml\n@@ -86,16 +86,21 @@ $defs:\n qdss_gpio_tracectl, qdss_gpio_tracedata, qlink_big_enable,\n qlink_big_request, qlink_little_enable,\n qlink_little_request, qlink_wmss, qspi0, qspi_clk,\n- qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se3, qup1_se4,\n- qup1_se5, qup1_se6, qup1_se7, qup2_se0, qup2_se1,\n- qup2_se2, qup2_se3, qup2_se4, qup2_se5, qup2_se6,\n- qup2_se7, resout_gpio, sd_write_protect, sdc1, sdc2,\n- sdc2_fb_clk, tb_trig_sdc1, tb_trig_sdc2, tmess_prng0,\n- tmess_prng1, tmess_prng2, tmess_prng3, tsense_pwm1,\n- tsense_pwm2, tsense_pwm3, tsense_pwm4, uim0_clk,\n- uim0_data, uim0_present, uim0_reset, uim1_clk, uim1_data,\n- uim1_present, uim1_reset, usb0_hs, usb_phy, vfr_0, vfr_1,\n- vsense_trigger_mirnat, wcn_sw_ctrl ]\n+ qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se2_l2_mira,\n+ qup1_se2_l2_mirb, qup1_se2_l3_mira, qup1_se2_l3_mirb,\n+ qup1_se3, qup1_se4, qup1_se5, qup1_se6, qup1_se6_l1_mira,\n+ qup1_se6_l1_mirb, qup1_se6_l3_mira, qup1_se6_l3_mirb,\n+ qup1_se7, qup1_se7_l0_mira, qup1_se7_l0_mirb,\n+ qup1_se7_l1_mira, qup1_se7_l1_mirb, qup2_se0, qup2_se1,\n+ qup2_se2, qup2_se3, qup2_se3_l0_mira, qup2_se3_l0_mirb,\n+ qup2_se3_l1_mira, qup2_se3_l1_mirb, qup2_se4, qup2_se5,\n+ qup2_se6, qup2_se7, resout_gpio, sd_write_protect, sdc1,\n+ sdc2, sdc2_fb_clk, tb_trig_sdc1, tb_trig_sdc2,\n+ tmess_prng0, tmess_prng1, tmess_prng2, tmess_prng3,\n+ tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4,\n+ uim0_clk, uim0_data, uim0_present, uim0_reset, uim1_clk,\n+ uim1_data, uim1_present, uim1_reset, usb0_hs, usb_phy,\n+ vfr_0, vfr_1, vsense_trigger_mirnat, wcn_sw_ctrl ]\n required:\n - pins\n \n","prefixes":["v3","1/4"]}