{"id":2226944,"url":"http://patchwork.ozlabs.org/api/patches/2226944/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422214225.2242-38-mohamed@unpredictable.fr/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260422214225.2242-38-mohamed@unpredictable.fr>","list_archive_url":null,"date":"2026-04-22T21:42:25","name":"[v3,37/37] whpx: i386: documentation update","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"5dbb88ba9ccded35d7f1aa1da873c4d6f8b2d11d","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422214225.2242-38-mohamed@unpredictable.fr/mbox/","series":[{"id":501116,"url":"http://patchwork.ozlabs.org/api/series/501116/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501116","date":"2026-04-22T21:41:48","name":"[v3,01/37] target/i386: emulate: include name of unhandled instruction","version":3,"mbox":"http://patchwork.ozlabs.org/series/501116/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226944/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226944/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=XOEMsno3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1CW61kyXz1yD5\n\tfor ; Thu, 23 Apr 2026 07:47:30 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wFfMO-0000YA-P0; Wed, 22 Apr 2026 17:43:52 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wFfMI-0000Ds-DI\n for qemu-devel@nongnu.org; Wed, 22 Apr 2026 17:43:47 -0400","from p-east2-cluster5-host9-snip4-3.eps.apple.com ([57.103.79.106]\n helo=outbound.st.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wFfMG-0007qX-As\n for qemu-devel@nongnu.org; Wed, 22 Apr 2026 17:43:46 -0400","from outbound.st.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-east-1a-100-percent-1 (Postfix) with ESMTPS id\n AD5A61800230; Wed, 22 Apr 2026 21:43:39 +0000 (UTC)","from localhost.localdomain (unknown [17.42.251.67])\n by p00-icloudmta-asmtp-us-east-1a-100-percent-1 (Postfix) with ESMTPSA id\n 0752D18000C7; Wed, 22 Apr 2026 21:43:36 +0000 (UTC)"],"X-ICL-Out-Info":"\n HUtFAUMHWwJACUgBTUQeDx5WFlZNRAJCTQFIHV8DWRxBAUkdXw9LVxQEFVwFVgZXFHkNXR1FDlYZWgxSD1sOHBZLWFUJCgZdGFgVVgl3HlwASx1XBFQfUxJVHR0LRUtAEwRJAU1fDl4fBBdGGVUERx5dVkAZGQJRHFYNV0NUBF9QSQxBUGxaAEcXSB1dGVlvUF0cDhhZG0AVXRFQGVYJXhUXHkFNWgJWTQVKA18BWwZCC0oCWQVZB14LSgdfGlgKXVQXWwxaDlYwTBZDH1IPWxNNGVEBUkVUAgdYRxRHDg8TTAtHAlo0Vh9UGVoD","Dkim-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1776894223; x=1779486223;\n bh=v+52HVYpW3INL47PWIYPp5HJAsIPBwIJXcoInsCco2s=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=XOEMsno30+UadhseLMaCSNHJN6nm+lMKkFKF5wJgRE8e7PLB6HRWyWQye/Pw/YhdQf3hop4on2TIYn4WpN0Khb/IyTWklTIxMMbfpDHewDO2K3V8eHCpGlywwd6XlyjOLfpgh7t+cUJpZOc9Y7HrwVqVnZCQmy7TLD12JhQiJKHzlva07K9p8vWJIi23rEXd/eyKqKPDY6hIfBfELTQXOlFJWJCV4NGX87JQOFkiCX3evS1nlc+4SmnALDdFfHbzdhftgajqUeeLop1vJt8p8L1Vc/LVcFT89fqxCpGj/ewEouwGL1F3ukCRxiPXAot77oT3TdrPKcj8KAA5+W1mIw==","mail-alias-created-date":"1752046281608","From":"Mohamed Mediouni ","To":"qemu-devel@nongnu.org","Cc":"Pedro Barbuda , qemu-arm@nongnu.org,\n Pierrick Bouvier ,\n Mohamed Mediouni ,\n Roman Bolshakov ,\n \"Michael S. Tsirkin\" , Wei Liu ,\n Phil Dennis-Jordan ,\n Peter Maydell , Zhao Liu ,\n Paolo Bonzini ","Subject":"[PATCH v3 37/37] whpx: i386: documentation update","Date":"Wed, 22 Apr 2026 23:42:25 +0200","Message-ID":"<20260422214225.2242-38-mohamed@unpredictable.fr>","X-Mailer":"git-send-email 2.50.1","In-Reply-To":"<20260422214225.2242-1-mohamed@unpredictable.fr>","References":"<20260422214225.2242-1-mohamed@unpredictable.fr>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Authority-Info-Out":"v=2.4 cv=c92mgB9l c=1 sm=1 tr=0 ts=69e9410d\n cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117\n a=YrL12D//S6tul8v/L+6tKg==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=ktjdnHLW_yDM15NnqX0A:9","X-Proofpoint-GUID":"h1_NzvU4zbmdvpYXRrvfGPpUCTNM7nO9","X-Proofpoint-ORIG-GUID":"h1_NzvU4zbmdvpYXRrvfGPpUCTNM7nO9","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDIyMDIxMiBTYWx0ZWRfXzz5wZ0F/EjOv\n R5iV3DeWWu5n3MbRQm3DxOmPWBc0uqDnohJejrLnkcPQkvykSThIR5kbY0/HH09pbsNDeoEx1yv\n 7dnl5DuicAvtXF1qbxNwbT0DtC/bL/CyDpR7Y2cCMsqZNn6kTNh7nefJ0nwz3EQGYJ7d2X+FjJh\n jlu8dwAZXmh/hIrAyhQdsXmWAukJFRhqVnvca8ZK6/UQp8+OYKDooo7F2eADJPIWk4tlAU3u5j3\n TyYnx3WE/egoZzlKU6423mn6OPGR4R/Zez94EJV+tK7tIqbLNg90P3uAuREpUYbWa9U25Rhh2Qw\n iZUBu6pIks97PncjwCbs00ChuUfcTITYgk3NB3cCCc4qJCcRqdTWsSQiTfTCMk=","Received-SPF":"pass client-ip=57.103.79.106;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Mohamed Mediouni \n---\n docs/system/whpx.rst | 40 +++++++++++-----------------------------\n 1 file changed, 11 insertions(+), 29 deletions(-)","diff":"diff --git a/docs/system/whpx.rst b/docs/system/whpx.rst\nindex 3e1979028c..9909e86831 100644\n--- a/docs/system/whpx.rst\n+++ b/docs/system/whpx.rst\n@@ -63,7 +63,7 @@ additional functionality compared to ``-device ramfb``, but is\n incompatible with Windows's UEFI GOP implementation, which\n expects a linear framebuffer to be available.\n \n-Some tracing options\n+Accelerator options\n --------------------\n \n x86_64\n@@ -75,6 +75,11 @@ to undocumented MSRs.\n ``-d invalid_mem`` allows to trace accesses to unmapped\n GPAs.\n \n+``-accel whpx,ssd=off`` disables the separate security domain feature,\n+as in a BTB flush when entering/exiting the guest. This results in a\n+significant MMIO performance increase at the detriment of security\n+mitigations.\n+\n Known issues on x86_64\n ----------------------\n \n@@ -96,45 +101,22 @@ MMX, SSE or AVX instructions for access to MMIO memory ranges.\n Attempts to run such guests will result in an ``Unimplemented handler``\n warning for MMX and a failure to decode for newer instructions.\n \n-``-M isapc``\n-^^^^^^^^^^^^\n-\n-``-M isapc`` doesn't disable the Hyper-V LAPIC on its own yet. To\n-be able to use that machine, use ``-accel whpx,hyperv=off,kernel-irqchip=off``.\n-\n-However, in QEMU 11.0, the guest will still be a 64-bit x86\n-ISA machine with all the corresponding CPUID leaves exposed.\n-\n-gdbstub\n-^^^^^^^\n-\n-As save/restore of xsave state is not currently present, state\n-exposed through GDB will be incomplete.\n-\n-The same also applies to ``info registers``.\n-\n-``-cpu type`` ignored\n-^^^^^^^^^^^^^^^^^^^^^\n-\n-In this release, -cpu is an ignored argument. \n-\n PIC interrupts on Windows 10\n ^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n \n On Windows 10, a legacy PIC interrupt injected does not wake the guest\n from an HLT when using the Hyper-V provided interrupt controller.\n \n-This has been addressed in QEMU 11.0 on Windows 11 platforms but\n-functionality to make it available on Windows 10 isn't present.\n+As such, on Windows 10, using the Hyper-V interrupt controller is\n+disabled by default. You can enable it via ``-M q35,pic=off`` which\n+disables the PIC. In that configuration, using a UEFI is recommended.\n \n-Workaround: for affected use cases, use ``-M kernel-irqchip=off``.\n+On this release, ``-M kernel-irqchip=`` is not expected to be manually\n+set during normal operation. It remains as a debugging option.\n \n Known issues on Windows 11\n ^^^^^^^^^^^^^^^^^^^^^^^^^^\n \n-Nested virtualisation-specific Hyper-V enlightenments are not\n-currently exposed.\n-\n arm64\n -----\n \n","prefixes":["v3","37/37"]}