{"id":2226894,"url":"http://patchwork.ozlabs.org/api/patches/2226894/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.10@forge-stage.sourceware.org/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2026-04-22T19:01:44","name":"[v2,10/14] arm: [MVE intrinsics] rework sqrshrl sqrshrl_sat48","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d5e9c0e4b0d4a05dd0847fb886517400cc33cb8a","submitter":{"id":92734,"url":"http://patchwork.ozlabs.org/api/people/92734/?format=json","name":"Christophe Lyon via Sourceware Forge","email":"forge-bot+clyon@forge-stage.sourceware.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.10@forge-stage.sourceware.org/mbox/","series":[{"id":501104,"url":"http://patchwork.ozlabs.org/api/series/501104/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=501104","date":"2026-04-22T19:01:35","name":"arm: [MVE intrinsics] rework vpnot, vgetq_lane, vsetq_lane, vuninitialized and scalar shifts","version":2,"mbox":"http://patchwork.ozlabs.org/series/501104/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226894/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226894/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org; dmarc=none (p=none dis=none)\n header.from=forge-stage.sourceware.org","sourceware.org;\n spf=pass smtp.mailfrom=forge-stage.sourceware.org","server2.sourceware.org;\n arc=none smtp.remote-ip=38.145.34.39"],"Received":["from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1BvK1rcXz1yD5\n\tfor ; Thu, 23 Apr 2026 07:19:57 +1000 (AEST)","from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 6F2294C375EE\n\tfor ; Wed, 22 Apr 2026 21:19:55 +0000 (GMT)","from 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b=Xhn2s/BQOqDBzZ52NCcAaNxKeBvwKVyC3wOt8R+diHe6RmAZM3FQdTPgazmFYwTDjDb5q4FE831/VRJuaPK4nXON01luc4XfU+REXyjvqIqFt/xnlalFDv5yZYd9EwaEsRkxANoxIPTGn2oJcc3ZMI5BUirPpJMc/sQ5+gb7DPs=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776884569; c=relaxed/simple;\n bh=nGmWkMza+3kSG6CoGKghk2/79uFx6OnHbs0a6Iqj/bk=;\n h=From:Date:Subject:To:Message-ID;\n b=VO0H4ChVVz3QIheMsixEfp0w3MG7BGA5PuM774BH+bHjn72eS0DCejPoU8YMgzJHnSbpX9T93blcyUzqTA1fOVusFrhFlWcj9sCwDL6YeqG71L0a/yUjcR8KTf6HCQTCjIj0q7Qi1fJBVh+Yeea1iWbZ0KBEGkK8/KoDKU/DinU=","ARC-Authentication-Results":"i=1; server2.sourceware.org","From":"Christophe Lyon via Sourceware Forge\n ","Date":"Wed, 22 Apr 2026 19:01:44 +0000","Subject":"[PATCH v2 10/14] arm: [MVE intrinsics] rework sqrshrl sqrshrl_sat48","To":"gcc-patches mailing list ","Cc":"sloosemore@baylibre.com","Message-ID":"\n ","X-Mailer":"batrachomyomachia","X-Pull-Request-Organization":"gcc","X-Pull-Request-Repository":"gcc-TEST","X-Pull-Request":"https://forge.sourceware.org/gcc/gcc-TEST/pulls/121","References":"\n ","In-Reply-To":"\n ","X-Patch-URL":"\n https://forge.sourceware.org/clyon/gcc-TEST/commit/65d776a09a8f8af91efcef40b284519ee5f1614b","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Reply-To":"gcc-patches mailing list ,\n sloosemore@baylibre.com, clyon@gcc.gnu.org","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"From: Christophe Lyon \n\nImplement sqrshrl and sqrshrl_sat48 using the new MVE builtins\nframework.\n\ngcc/ChangeLog:\n\t* config/arm/arm-mve-builtins-base.cc (enum which_scalar_shift):\n\tAdd ss_SQRSHRL, ss_SQRSHRL_SAT48.\n\t(mve_function_scalar_shift): Add support for ss_SQRSHRL,\n\tss_SQRSHRL_SAT48.\n\t(sqrshrl, sqrshrl_sat48): New.\n\t* config/arm/arm-mve-builtins-base.def (sqrshrl, sqrshrl_sat48): New.\n\t* config/arm/arm-mve-builtins-base.h (sqrshrl, sqrshrl_sat48): New.\n\t* config/arm/arm_mve.h (sqrshrl): Delete.\n\t(sqrshrl_sat48): Delete.\n\t(__arm_sqrshrl): Delete.\n\t(__arm_sqrshrl_sat48): Delete.\n\t* config/arm/mve.md (mve_sqrshrl_sat_di): Add '@' prefix.\n---\n gcc/config/arm/arm-mve-builtins-base.cc | 12 ++++++++++++\n gcc/config/arm/arm-mve-builtins-base.def | 2 ++\n gcc/config/arm/arm-mve-builtins-base.h | 2 ++\n gcc/config/arm/arm_mve.h | 16 ----------------\n gcc/config/arm/mve.md | 2 +-\n 5 files changed, 17 insertions(+), 17 deletions(-)","diff":"diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc\nindex 9f3b83355c9b..a192252f35a4 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.cc\n+++ b/gcc/config/arm/arm-mve-builtins-base.cc\n@@ -1246,6 +1246,8 @@ public:\n enum which_scalar_shift {\n ss_ASRL,\n ss_LSLL,\n+ ss_SQRSHRL,\n+ ss_SQRSHRL_SAT48,\n ss_UQRSHLL,\n ss_UQRSHLL_SAT48,\n };\n@@ -1277,6 +1279,14 @@ public:\n \tcode = CODE_FOR_mve_lsll;\n \tbreak;\n \n+ case ss_SQRSHRL:\n+\tcode = code_for_mve_sqrshrl_sat_di (SQRSHRL_64);\n+\tbreak;\n+\n+ case ss_SQRSHRL_SAT48:\n+\tcode = code_for_mve_sqrshrl_sat_di (SQRSHRL_48);\n+\tbreak;\n+\n case ss_UQRSHLL:\n \tcode = code_for_mve_uqrshll_sat_di (UQRSHLL_64);\n \tbreak;\n@@ -1462,6 +1472,8 @@ namespace arm_mve {\n \n FUNCTION (asrl, mve_function_scalar_shift, (ss_ASRL))\n FUNCTION (lsll, mve_function_scalar_shift, (ss_LSLL))\n+FUNCTION (sqrshrl, mve_function_scalar_shift, (ss_SQRSHRL))\n+FUNCTION (sqrshrl_sat48, mve_function_scalar_shift, (ss_SQRSHRL_SAT48))\n FUNCTION (uqrshll, mve_function_scalar_shift, (ss_UQRSHLL))\n FUNCTION (uqrshll_sat48, mve_function_scalar_shift, (ss_UQRSHLL_SAT48))\n FUNCTION_PRED_P_S_U (vabavq, VABAVQ)\ndiff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def\nindex 29ca4045be36..6ecb05e877b4 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.def\n+++ b/gcc/config/arm/arm-mve-builtins-base.def\n@@ -20,6 +20,8 @@\n #define REQUIRES_FLOAT false\n DEF_MVE_FUNCTION (asrl, scalar_s64_shift, none, none)\n DEF_MVE_FUNCTION (lsll, scalar_u64_shift, none, none)\n+DEF_MVE_FUNCTION (sqrshrl, scalar_s64_shift, none, none)\n+DEF_MVE_FUNCTION (sqrshrl_sat48, scalar_s64_shift, none, none)\n DEF_MVE_FUNCTION (uqrshll, scalar_u64_shift, none, none)\n DEF_MVE_FUNCTION (uqrshll_sat48, scalar_u64_shift, none, none)\n DEF_MVE_FUNCTION (vabavq, binary_acca_int32, all_integer, p_or_none)\ndiff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h\nindex 953ae3d0894e..2f047008573d 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.h\n+++ b/gcc/config/arm/arm-mve-builtins-base.h\n@@ -25,6 +25,8 @@ namespace functions {\n \n extern const function_base *const asrl;\n extern const function_base *const lsll;\n+extern const function_base *const sqrshrl;\n+extern const function_base *const sqrshrl_sat48;\n extern const function_base *const uqrshll;\n extern const function_base *const uqrshll_sat48;\n extern const function_base *const vabavq;\ndiff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h\nindex d27195efe978..704a04eba452 100644\n--- a/gcc/config/arm/arm_mve.h\n+++ b/gcc/config/arm/arm_mve.h\n@@ -59,8 +59,6 @@\n #define vuninitializedq_f16(void) __arm_vuninitializedq_f16(void)\n #define vuninitializedq_f32(void) __arm_vuninitializedq_f32(void)\n #define sqrshr(__p0, __p1) __arm_sqrshr(__p0, __p1)\n-#define sqrshrl(__p0, __p1) __arm_sqrshrl(__p0, __p1)\n-#define sqrshrl_sat48(__p0, __p1) __arm_sqrshrl_sat48(__p0, __p1)\n #define sqshl(__p0, __p1) __arm_sqshl(__p0, __p1)\n #define sqshll(__p0, __p1) __arm_sqshll(__p0, __p1)\n #define srshr(__p0, __p1) __arm_srshr(__p0, __p1)\n@@ -72,20 +70,6 @@\n #define urshrl(__p0, __p1) __arm_urshrl(__p0, __p1)\n #endif\n \n-__extension__ extern __inline int64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_sqrshrl (int64_t value, int32_t shift)\n-{\n- return __builtin_mve_sqrshrl_sat64_di (value, shift);\n-}\n-\n-__extension__ extern __inline int64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_sqrshrl_sat48 (int64_t value, int32_t shift)\n-{\n- return __builtin_mve_sqrshrl_sat48_di (value, shift);\n-}\n-\n __extension__ extern __inline uint64_t\n __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n __arm_uqshll (uint64_t value, const int shift)\ndiff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md\nindex 62bb14d94cc0..888837674ed3 100644\n--- a/gcc/config/arm/mve.md\n+++ b/gcc/config/arm/mve.md\n@@ -4291,7 +4291,7 @@\n ;;\n ;; [sqrshrl_di]\n ;;\n-(define_insn \"mve_sqrshrl_sat_di\"\n+(define_insn \"@mve_sqrshrl_sat_di\"\n [(set (match_operand:DI 0 \"arm_low_register_operand\" \"=l\")\n \t(unspec:DI [(match_operand:DI 1 \"arm_low_register_operand\" \"0\")\n \t\t (match_operand:SI 2 \"register_operand\" \"r\")]\n","prefixes":["v2","10/14"]}