{"id":2226877,"url":"http://patchwork.ozlabs.org/api/patches/2226877/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.8@forge-stage.sourceware.org/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.8@forge-stage.sourceware.org>","list_archive_url":null,"date":"2026-04-22T19:01:42","name":"[v2,08/14] arm: [MVE intrinsics] rework asrl lsll [PR122216]","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"4dbf53513d1b07acc60160099e07c36fbcb72698","submitter":{"id":92734,"url":"http://patchwork.ozlabs.org/api/people/92734/?format=json","name":"Christophe Lyon via Sourceware Forge","email":"forge-bot+clyon@forge-stage.sourceware.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.8@forge-stage.sourceware.org/mbox/","series":[{"id":501104,"url":"http://patchwork.ozlabs.org/api/series/501104/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=501104","date":"2026-04-22T19:01:35","name":"arm: [MVE intrinsics] rework vpnot, vgetq_lane, vsetq_lane, vuninitialized and scalar shifts","version":2,"mbox":"http://patchwork.ozlabs.org/series/501104/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226877/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226877/checks/","tags":{},"related":[],"headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org; dmarc=none (p=none dis=none)\n header.from=forge-stage.sourceware.org","sourceware.org;\n spf=pass smtp.mailfrom=forge-stage.sourceware.org","server2.sourceware.org;\n arc=none smtp.remote-ip=38.145.34.39"],"Received":["from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1BXG48mvz1yDD\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 23 Apr 2026 07:03:26 +1000 (AEST)","from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 7ACE845C3883\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 22 Apr 2026 20:56:27 +0000 (GMT)","from forge-stage.sourceware.org (vm08.sourceware.org [38.145.34.39])\n by sourceware.org (Postfix) with ESMTPS id 111134015EBD\n for <gcc-patches@gcc.gnu.org>; Wed, 22 Apr 2026 19:02:49 +0000 (GMT)","from forge-stage.sourceware.org (localhost [IPv6:::1])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange x25519 server-signature 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b=akNu/7rZ0FJMzJpx/EqIxCmILYfXc8x0qXFNgezoRG4MRL6/D2fRW72UyHGh2kCZb0Xdwhh+1fSCoXD1KZMU2srXf8mUkV+iLPEuoqQ/sNfwvkjtcmXLsBWNzrJ9b8LMnTLyqIAyhsg+VvSTeciZlMNest3KKVYHXoafdeqnQoU=","ARC-Authentication-Results":"i=1; server2.sourceware.org","From":"Christophe Lyon via Sourceware Forge\n <forge-bot+clyon@forge-stage.sourceware.org>","Date":"Wed, 22 Apr 2026 19:01:42 +0000","Subject":"[PATCH v2 08/14] arm: [MVE intrinsics] rework asrl lsll [PR122216]","To":"gcc-patches mailing list <gcc-patches@gcc.gnu.org>","Cc":"sloosemore@baylibre.com","Message-ID":"\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.8@forge-stage.sourceware.org>","X-Mailer":"batrachomyomachia","X-Pull-Request-Organization":"gcc","X-Pull-Request-Repository":"gcc-TEST","X-Pull-Request":"https://forge.sourceware.org/gcc/gcc-TEST/pulls/121","References":"\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.0@forge-stage.sourceware.org>","In-Reply-To":"\n <bmm.hhuph3sz8c.gcc.gcc-TEST.clyon.121.2.0@forge-stage.sourceware.org>","X-Patch-URL":"\n https://forge.sourceware.org/clyon/gcc-TEST/commit/67b6e85cf717f9c65cbe6edc204363be58e9fb15","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list <gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>","List-Archive":"<https://gcc.gnu.org/pipermail/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-request@gcc.gnu.org?subject=help>","List-Subscribe":"<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>","Reply-To":"gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n sloosemore@baylibre.com, clyon@gcc.gnu.org","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"From: Christophe Lyon <christophe.lyon@linaro.org>\n\nImplement asrl and lsll using the new MVE builtins framework.\n\ngcc/ChangeLog:\n\n\tPR target/122216\n\t* config/arm/arm-mve-builtins-base.cc (enum which_scalar_shift): New.\n\t(mve_function_scalar_shift): New.\n\t(asrl, lsll): New.\n\t* config/arm/arm-mve-builtins-base.def (asrl, lsll): New.\n\t* config/arm/arm-mve-builtins-base.h (asrl, lsll): New.\n\t* config/arm/arm_mve.h (asrl): Delete.\n\t(lsll): Delete.\n\t(__arm_asrl): Delete.\n\t(__arm_lsll): Delete.\n---\n gcc/config/arm/arm-mve-builtins-base.cc  | 43 ++++++++++++++++++++++++\n gcc/config/arm/arm-mve-builtins-base.def |  2 ++\n gcc/config/arm/arm-mve-builtins-base.h   |  2 ++\n gcc/config/arm/arm_mve.h                 | 16 ---------\n 4 files changed, 47 insertions(+), 16 deletions(-)","diff":"diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc\nindex eecfb31f0cc6..66d77ffe90ee 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.cc\n+++ b/gcc/config/arm/arm-mve-builtins-base.cc\n@@ -1242,6 +1242,47 @@ public:\n   }\n };\n \n+/* Map the function directly to the appropriate scalar shift builtin.  */\n+enum which_scalar_shift {\n+  ss_ASRL,\n+  ss_LSLL,\n+};\n+\n+class mve_function_scalar_shift : public function_base\n+{\n+public:\n+  CONSTEXPR mve_function_scalar_shift (enum which_scalar_shift shl)\n+    : m_scalar_shift (shl)\n+  {}\n+\n+  /* Which scalar_shift builtin to map.  */\n+  enum which_scalar_shift m_scalar_shift;\n+\n+  rtx\n+  expand (function_expander &e) const override\n+  {\n+    insn_code code;\n+\n+    switch (m_scalar_shift)\n+      {\n+      case ss_ASRL:\n+\te.args[1] = simplify_gen_subreg (QImode, e.args[1], SImode, 0);\n+\tcode = CODE_FOR_mve_asrl;\n+\tbreak;\n+\n+      case ss_LSLL:\n+\te.args[1] = simplify_gen_subreg (QImode, e.args[1], SImode, 0);\n+\tcode = CODE_FOR_mve_lsll;\n+\tbreak;\n+\n+      default:\n+\tgcc_unreachable ();\n+      }\n+\n+    return e.use_unpred_insn (code);\n+  }\n+};\n+\n } /* end anonymous namespace */\n \n namespace arm_mve {\n@@ -1409,6 +1450,8 @@ namespace arm_mve {\n    (-1, -1, UNSPEC##_F,\t\t\t\t\t\t\t\\\n     -1, -1, UNSPEC##_P_F))\n \n+FUNCTION (asrl, mve_function_scalar_shift, (ss_ASRL))\n+FUNCTION (lsll, mve_function_scalar_shift, (ss_LSLL))\n FUNCTION_PRED_P_S_U (vabavq, VABAVQ)\n FUNCTION_WITHOUT_N (vabdq, VABDQ)\n FUNCTION (vabsq, unspec_based_mve_function_exact_insn, (ABS, ABS, ABS, -1, -1, -1, VABSQ_M_S, -1, VABSQ_M_F, -1, -1, -1))\ndiff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def\nindex e5a295265f6c..422b5580c53b 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.def\n+++ b/gcc/config/arm/arm-mve-builtins-base.def\n@@ -18,6 +18,8 @@\n    <http://www.gnu.org/licenses/>.  */\n \n #define REQUIRES_FLOAT false\n+DEF_MVE_FUNCTION (asrl, scalar_s64_shift, none, none)\n+DEF_MVE_FUNCTION (lsll, scalar_u64_shift, none, none)\n DEF_MVE_FUNCTION (vabavq, binary_acca_int32, all_integer, p_or_none)\n DEF_MVE_FUNCTION (vabdq, binary, all_integer, mx_or_none)\n DEF_MVE_FUNCTION (vabsq, unary, all_signed, mx_or_none)\ndiff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h\nindex 285cb0c69575..0f35031dcc97 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.h\n+++ b/gcc/config/arm/arm-mve-builtins-base.h\n@@ -23,6 +23,8 @@\n namespace arm_mve {\n namespace functions {\n \n+extern const function_base *const asrl;\n+extern const function_base *const lsll;\n extern const function_base *const vabavq;\n extern const function_base *const vabdq;\n extern const function_base *const vabsq;\ndiff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h\nindex 9947420dcdb0..c642a3c4327c 100644\n--- a/gcc/config/arm/arm_mve.h\n+++ b/gcc/config/arm/arm_mve.h\n@@ -72,24 +72,8 @@\n #define uqshll(__p0, __p1) __arm_uqshll(__p0, __p1)\n #define urshr(__p0, __p1) __arm_urshr(__p0, __p1)\n #define urshrl(__p0, __p1) __arm_urshrl(__p0, __p1)\n-#define lsll(__p0, __p1) __arm_lsll(__p0, __p1)\n-#define asrl(__p0, __p1) __arm_asrl(__p0, __p1)\n #endif\n \n-__extension__ extern __inline  uint64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_lsll (uint64_t value, int32_t shift)\n-{\n-  return (value << shift);\n-}\n-\n-__extension__ extern __inline int64_t\n-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n-__arm_asrl (int64_t value, int32_t shift)\n-{\n-  return (value >> shift);\n-}\n-\n __extension__ extern __inline uint64_t\n __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))\n __arm_uqrshll (uint64_t value, int32_t shift)\n","prefixes":["v2","08/14"]}