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Ip=[4.158.2.129];\n Helo=[outbound-uk1.az.dlp.m.darktrace.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n AMS1EPF0000004A.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"These tests were configured to try assembling whenever the assembler\nsupports sme2. Add dg-do directives to restrict this assemblers that\nsupport sme-lutv2 (and otherwise just compile the test).\n\nCommitted as obvious.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/sme2/acle-asm/svluti4_zt_1.c: Add dg-do.\n\t* gcc.target/aarch64/sme2/acle-asm/svwrite_lane_zt_1.c: Ditto.\n\t* gcc.target/aarch64/sme2/acle-asm/svwrite_zt_1.c: Ditto.\n\t* lib/target-supports.exp: Add sme-lutv2 to exts_sve2.","diff":"diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svluti4_zt_1.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svluti4_zt_1.c\nindex d05c2e01a8ec65a129ff95537c0d420ef70b28b8..f56ef92cba5493c4e92699e415f59622f1e4aefd 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svluti4_zt_1.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svluti4_zt_1.c\n@@ -1,3 +1,5 @@\n+/* { dg-do assemble { target aarch64_asm_sme-lutv2_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sme-lutv2_ok } } } */\n /* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n \n /* LUTI4 (four registers, 8-bit)\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_lane_zt_1.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_lane_zt_1.c\nindex 256e32b0f6aac3916efbac1e29c39a8027789aff..3ca3e08215dc160d98d076fb427124219f27cd31 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_lane_zt_1.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_lane_zt_1.c\n@@ -1,3 +1,5 @@\n+/* { dg-do assemble { target aarch64_asm_sme-lutv2_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sme-lutv2_ok } } } */\n /* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n \n /* MOVT (vector to table)\ndiff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_zt_1.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_zt_1.c\nindex dfe3267e0cbe509d2f5d9fe9e396d681c6c26dcd..ceb684273d04ad223913b324970fddc44221f7ce 100644\n--- a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_zt_1.c\n+++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/svwrite_zt_1.c\n@@ -1,3 +1,5 @@\n+/* { dg-do assemble { target aarch64_asm_sme-lutv2_ok } } */\n+/* { dg-do compile { target { ! aarch64_asm_sme-lutv2_ok } } } */\n /* { dg-final { check-function-bodies \"**\" \"\" \"-DCHECK_ASM\" } } */\n \n /* MOVT (vector to table)\ndiff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp\nindex 64e7653e755b2d352ddc8ff0965963ea04bceb7c..f3b7967b888cb2d45a111d877264bc1b3c4607cb 100644\n--- a/gcc/testsuite/lib/target-supports.exp\n+++ b/gcc/testsuite/lib/target-supports.exp\n@@ -12764,7 +12764,7 @@ set exts {\n set exts_sve2 {\n \"sme-f8f16\" \"sme-f8f32\"\n \"sme-b16b16\" \"sme-f16f16\" \"sme-i16i64\" \"sme\" \"sme2\" \"sme2p1\"\n- \"ssve-fp8dot2\" \"ssve-fp8dot4\" \"ssve-fp8fma\" \"sve-bfscale\"\n+ \"ssve-fp8dot2\" \"ssve-fp8dot4\" \"ssve-fp8fma\" \"sve-bfscale\" \"sme-lutv2\"\n }\n \n foreach { aarch64_ext } $exts {\n","prefixes":["committed","1/2"]}