{"id":2226122,"url":"http://patchwork.ozlabs.org/api/patches/2226122/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260422093549.407022-10-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260422093549.407022-10-sherry.sun@nxp.com>","list_archive_url":null,"date":"2026-04-22T09:35:46","name":"[V14,09/12] arm64: dts: imx8mp: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b1a6f411f80cfaaf191c956e56c1641e0cc4f6a0","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260422093549.407022-10-sherry.sun@nxp.com/mbox/","series":[{"id":500954,"url":"http://patchwork.ozlabs.org/api/series/500954/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=500954","date":"2026-04-22T09:35:40","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":14,"mbox":"http://patchwork.ozlabs.org/series/500954/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226122/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226122/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V14 09/12] arm64: dts: imx8mp: Add Root Port node and PERST\n property","Date":"Wed, 22 Apr 2026 17:35:46 +0800","Message-Id":"<20260422093549.407022-10-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260422093549.407022-1-sherry.sun@nxp.com>","References":"<20260422093549.407022-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SG2PR01CA0140.apcprd01.prod.exchangelabs.com\n (2603:1096:4:8f::20) To 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G/m5lt0Shqdu21NhNgW0GxB4aNJmrxFwNcBOqBcdf0ZG0MPa60E3ECjDAYJD5mIlev7PYIpngWzy3dIcTuDbtR8qu6ggXZ7rJEfRmd1/fgC0hRDQgYypcr6P1g0Uw1ii2Noej856Dj+9IUJKjqOl5AOTbOP+TzDx+REGEKTaNUVXUt8aY9qAE+E6BmYpQrJQjMXiQfL7GSoDXjWOq+SYTJXu2xC8K/l+JQvytlpl42gGiGxW/dkUOWUka1a4HZEozxeJJBxD1kVpVOXszcy3bdWxb+TalXGEJlvF0Cxp7RdE3Lb+jbTxAf1nSg642DSnQaZ3N+3c4jlicW/51WuatF9bCOi8myY1OfS0mErOExsJulExBWMe7nrpBbBKhN2woLBzridBN+oyckqHxLxxs2mgaeCpsLZKN6G4pa+gM+9gUouS/63mHM7VZAkGyUofTmfj/39j+AFMy05ewVCngtHu0syCmlHNOPiEuOH31Er+U4M/dh3aselzqRF2PvbdAc0txtAucv9Mda5JWrWZXsgaph5OdMUva2v3GQpvyg9ALeuijM8G0bKL53hzs9kU1O0lN2MinwoeQRhkG184s4H6JwEmT63ccQJQXfRPbiY8JQzFeJI8IN3vqS/lxPe89V5365JM4qfn8Xfqj5OlwcskCe+bBrxPd/V0cEoY8J5Le5jhoJrcN6aik8QOwYqXLs3mieFm6NrfQLvwUOSKu4x9hNSzLAtXp4rNfH96jPA6r21tWXdeSOr3m/8X511YS3XhC4eAEvracXKsKabGjuGzYEmTCqY1Gt5BX04RAIAyn9eVPKritO9vhfP375HgwUNmpfdZ4Xy73+dv4SFTXs4vQJnhSRieTUPBxXIm+0hCl9AoodgA9+by4OUlgYnf9eYfzerVrZtI1qoyVxdJSOAkSQezjmmJmTTCS68ohHk9YlEfHTHfgfpFNcpooSAwu21ZHN9za3pzDpq8hyR7oJjRtzeyQ6Bbw3uh/USalsbeq1SAeM6K1mm1dZJyCnDUyMnU0KElrI/OrON2BGwKlamE9ssXPAA9nr6QwT9zCf8VSSdQWaGRZbWhaL3Pp1RShxhelf5U0Uuhiz8HBJoUFQf7mBVbn95FP9ugJ7TSQa3DSOcspdqRcrHM3/gGXDFSDf26778KsgZI6ZcKfYmTtI5qt9drHiuSWRSZFJ417EUfgJN8xhUHPKpKY3ptbbmACFcP98yxxOaWPJYF8A6+ohcvz8xAf3QZvseKwr9X1VMgX5Xp2g3g7BreBj0FlJ7h6h7NQmsHQZAfrfG0iBoeDe3Azi0QE77xspFNMvoTHyrwVrYLdskHbwgyEDwQqLv4hm7kwl7ZL0mTiZi8GVNZ/Wg0mZOtuxKd91nfFinRcoxql5t38JCtrSOXhrsjFoJtwyOj635AqreMzWE9hmRXQK8ymkvbIDELRLQphj7FFpIKG6UDZMVR5hoLUZkHvtw5uokeJUSdwlx/VOR0o5ymNbiY8bm7oZPhZsYHm8KDfl0dh35aSrADM42ycGRMn5raMWlbFmKRNKPdtejFKt+FMyKbE79QqqF+7MuvWFhYpwWHpEY6O8v6vCzxPa6zWsEUtKmsYDAUu8hFQTNgQ4vbw4M4b6wWQ81uYbZsBlN/4rjcgbs5N5tU+kpRToRFC4XDEFDygFdcuOSi6hDJyfLNbxED0OU9LeHsbWvY+4Wh0zrQdARBgKg/rfSQ3zbzIO+/XSgzym2IV3F3hHwnQbw+4w==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 6688c66d-f948-4f72-b6f0-08dea0527254","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"22 Apr 2026 09:35:09.9955\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n iJd6tl875KE/ygAZxy34H/Cfye1KSa3gptzzy3vbrC6qwh1mE4GkMzsHu8lJ6X7dCrKJi3VM1nOAMsDCGqfhEg==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"PA2PR04MB10129"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 5 +++++\n arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\nindex 2feb5b18645c..a7f3acdc36d1 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\n+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\n@@ -770,6 +770,7 @@ &pcie_phy {\n &pcie0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie0>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcie0>;\n \tvpcie3v3aux-supply = <®_pcie0>;\n@@ -783,6 +784,10 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcie0_port0 {\n+\treset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;\n+};\n+\n &pwm1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pwm1>;\ndiff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi\nindex 90d7bb8f5619..5ce2825182fd 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi\n@@ -2265,6 +2265,17 @@ pcie0: pcie: pcie@33800000 {\n \t\t\tphys = <&pcie_phy>;\n \t\t\tphy-names = \"pcie-phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie0_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\tpcie0_ep: pcie_ep: pcie-ep@33800000 {\n","prefixes":["V14","09/12"]}