{"id":2226119,"url":"http://patchwork.ozlabs.org/api/patches/2226119/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260422093549.407022-9-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260422093549.407022-9-sherry.sun@nxp.com>","list_archive_url":null,"date":"2026-04-22T09:35:45","name":"[V14,08/12] arm64: dts: imx8mm: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ffc89f47cf41525da5762048fbaa6ba79f00a818","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260422093549.407022-9-sherry.sun@nxp.com/mbox/","series":[{"id":500954,"url":"http://patchwork.ozlabs.org/api/series/500954/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=500954","date":"2026-04-22T09:35:40","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":14,"mbox":"http://patchwork.ozlabs.org/series/500954/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226119/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226119/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V14 08/12] arm64: dts: imx8mm: Add Root Port node and PERST\n property","Date":"Wed, 22 Apr 2026 17:35:45 +0800","Message-Id":"<20260422093549.407022-9-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260422093549.407022-1-sherry.sun@nxp.com>","References":"<20260422093549.407022-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SG2PR01CA0140.apcprd01.prod.exchangelabs.com\n (2603:1096:4:8f::20) To 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BFU06ufekowU+XNBDhggPvO8rQR4FYw9Odn3Fsus2qjqKYPrNBXskVM04DfkYZ5IsHmLVwSHg8xPxB2PGwfveucRN8iGB6LYf49sM7VzlKOY5U/EkGnQGtCwifZSs3zeX7BnIB0FBDWI6Ff3FMIBw9Q5Yo3kqX/YTLOOXlFIATjLg51MJddvrCStXmU0ytsK75YCs4DGwNupsxfMyVPK+3R82hWSOPhR5COZ0F/q+KI4gqSZIvk6k8R8c4rgXtJQccxMpeu0QrM1Htl7EWFXXtl65Do4jT7wJZJEfchm9SFw59jA7xByI6obbuD9DBUuOuLUqsIsBcIsaXj+RW7Pb95xlxduxMC5ge6eR/d4ZnqhqEBNQzLuDfCl2wFeebboZJCLfs5Rgu6ABPrzZvqGaXBxM7o5oxhop1iFGiPA3cO5v3qYuq6G04wJ2+J1BryrDLrKrQlcOK8N+KoWD/v7oZ6yc2bRlEAli2f9vYIewry6AXwKcGJ8svDcHk6PjmyLfNfnWQSKBorIBS5pxteJisX2XHA8+Pb0qnZAuwe8m4WUO8jFLfoA4gbnx4hbzey7LtCK/H7ygG1XgC1PwInN35+orpAhYrHW06vkOiHKTPz9KXPuwXRJorIcjGEnjXqeZwko4v2WWDflNjyRdLv/0wJ12/89rEEPdP+qm9tVJtEmefiBqt0SjrwWpsSip3Cp/X+VFzxrI3gCUK1t/kBqYDfb3IEDczpVRDlf7CJ9f4/NrlVu4CaeJVlUBEVSrkzit+e9w4IHR07Frk2V/GlYAqsUg/2UwO5+9kqGQT/vU8leyacWbvCdyKVJ4xCxLDOquzqENA4Vpze4W0QnH4zXJ5YEYl+Ob16/hU0ongPMLpjm8Hb72Rq0p5aZXoXk0sqm5w5MgC1KL5DGhRr4uf7XQjVn9t6GuNVjfgOgJQOnzlw84z2aVmpk5oyudLj10v3eRkChH1+B5+6sIz+ImvEml9x/yZsMFTsgsJXhiP7EUBNhOVy+f66HcRiqEzqjNeokro1Kbk+rFeEYnwRgmltHyFJ5e2wJSH/Cpj1EncWDmsyk23CRpu7+D7UpjbyKOk3O2AT+opevHq2pilLHI2r85OSRjwLaCmX52ntbAs3daxZTC0FspgJa1dwFtW81choJgM6KgijHgx/NDRnamopfHXdKFHM4y9ljMudqSsu+4rfa+L34F51bzhZkAftS3DLc3DacRmEGlAIhWvgM3oGB274Jl/sfp6qx6dxZ/Nkj/An3//avpLytxGOvkNi0x/6R15eJTFpr+mDN9Cr2AjkY29zd3ywsOAUmL4Bk50Uo2nWG/ycd3UNyc3JKKwq6WRq+QJFdTc9W0cPlaRqgzS6uPSzkyGHQHJTjwF2xeTf61euTS8WO/cROgfw0Gxxo+1pB5mPLvENQhHMa/hDA1wA9Hzzs6Vw39+7geDqS7ENbpFbshTaOUnnXlGONbtLCo++HMfp/N4lHTLIm0a0qrsyelFNa+DZ9Q9rh/1dBZed8D7/+jizTzxughIUqy9uD9K/SfXMcFNrOTMi0E+BhlDdESSHniQnV/2SDdkZCPuQcGEYPbKxsX069U51V2mQAkFvoIgscuM7Ke52El6Bm5PJcFMeGnOM4gqT8Y98cdxfdGGfaY6hwJyVx7v9DLFcZ6OO9yE1NbfcmIilpAobovSbGfQGXZj+aqFxNIGwQqw/00PZeEEqIn3LQuH3LVYcvZYHQuPuBZ4EekKh/7QLRZa84TA==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 2c7042a4-19bb-42bf-5123-08dea0526ec1","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"22 Apr 2026 09:35:04.1447\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n KzssiJk7v0PiV7NXtAY2yHViPG6ICQW2/F8T/GYXJvPPPsAbFOs859QmbMFW5GWi3kEWAzq5uaicIxLSIsEyeA==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"PA2PR04MB10129"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 5 +++++\n arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\nindex 8be44eaf4e1e..e03aba825c18 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\n@@ -533,6 +533,7 @@ &pcie_phy {\n &pcie0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie0>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;\n \tclocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,\n \t\t <&clk IMX8MM_CLK_PCIE1_AUX>;\n@@ -559,6 +560,10 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcie0_port0 {\n+\treset-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;\n+};\n+\n &sai2 {\n \t#sound-dai-cells = <0>;\n \tpinctrl-names = \"default\";\ndiff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi\nindex 4cc5ad01d0e2..5cf2998d396d 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi\n@@ -1370,6 +1370,17 @@ pcie0: pcie@33800000 {\n \t\t\tphys = <&pcie_phy>;\n \t\t\tphy-names = \"pcie-phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie0_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\tpcie0_ep: pcie-ep@33800000 {\n","prefixes":["V14","08/12"]}