{"id":2226053,"url":"http://patchwork.ozlabs.org/api/patches/2226053/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/or1pg7tt1v.fsf_-_@lxoliva.fsfla.org/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2026-04-22T06:20:28","name":"[v2] libstdc++: simd: x86: accept 64-bit long double as double [PR124657]","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1950c2cf055fa576427e03d898320fb3421318cf","submitter":{"id":74937,"url":"http://patchwork.ozlabs.org/api/people/74937/?format=json","name":"Alexandre Oliva","email":"oliva@adacore.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/or1pg7tt1v.fsf_-_@lxoliva.fsfla.org/mbox/","series":[{"id":500925,"url":"http://patchwork.ozlabs.org/api/series/500925/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=500925","date":"2026-04-22T06:20:28","name":"[v2] libstdc++: simd: x86: accept 64-bit long double as double [PR124657]","version":2,"mbox":"http://patchwork.ozlabs.org/series/500925/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226053/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226053/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=adacore.com header.i=@adacore.com header.a=rsa-sha256\n header.s=google header.b=CcssgHLp;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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Matthias?\n\n> Yes. It looks like a clean solution to me. I like Jonathan's suggestion. \n> std::experimental::simd is too expensive to compile already.\n\nHere's a patch that implements the suggested change, and that, along\nwith https://gcc.gnu.org/pipermail/gcc-patches/2026-April/712616.html\n(Ping?) enables pr109261_constexpr_simd.cc to succeed with\n-mlong-double-64 on x86_64 -msse. Regstrapped on x86_64-linux-gnu and\npowerpc64le-linux-gnu. Ok for stage1?\n\nJonathan, should I credit you for the preprocessor micro-optimization?\nI didn't quite follow it to the letter, because I thought it looked\ncleaner this way, and IIUC it would not bring any notable inefficiency.\n\n\nVarious simd_x86 functions that handle double need to be adjusted to\nmatch 64-bit long double as well.\n\nIntroduce __is_x86_ps<_Tp>() and __is_x86_pd<_Tp>() and use them\ninstead of is_same_v<_Tp, float> and is_same_v<_Tp, double>,\nrespectively.\n\n\nfor libstdc++-v3/ChangeLog\n\n\tPR libstdc++/124657\n\t* include/experimental/bits/simd_x86.h\n\t(__is_x86_ps<_Tp>): New. Replace is_same_v<_Tp, float> with it.\n\t(__is_x86_pd<_Tp>): New. Replace is_same_v<_Tp, double> with it.\n---\n libstdc++-v3/include/experimental/bits/simd_x86.h | 82 +++++++++++++--------\n 1 file changed, 50 insertions(+), 32 deletions(-)","diff":"diff --git a/libstdc++-v3/include/experimental/bits/simd_x86.h b/libstdc++-v3/include/experimental/bits/simd_x86.h\nindex 74c7a61998e0d..5d4ed5ad58c8e 100644\n--- a/libstdc++-v3/include/experimental/bits/simd_x86.h\n+++ b/libstdc++-v3/include/experimental/bits/simd_x86.h\n@@ -415,13 +415,31 @@ template \n #endif\n \n // ISA & type detection {{{\n+template \n+ constexpr bool\n+ __is_x86_ps()\n+ {\n+ return is_same_v<_Tp, float>;\n+ }\n+\n+template \n+ constexpr bool\n+ __is_x86_pd()\n+ {\n+#if __LDBL_MANT_DIG == __DBL_MANT_DIG\n+ if constexpr (is_same_v<_Tp, long double>)\n+ return true;\n+#endif\n+ return is_same_v<_Tp, double>;\n+ }\n+\n template \n constexpr bool\n __is_sse_ps()\n {\n return __have_sse\n-\t && is_same_v<_Tp,\n-\t\t\tfloat> && sizeof(__intrinsic_type_t<_Tp, _Np>) == 16;\n+\t && __is_x86_ps<_Tp>()\n+\t && sizeof(__intrinsic_type_t<_Tp, _Np>) == 16;\n }\n \n template \n@@ -429,8 +447,8 @@ template \n __is_sse_pd()\n {\n return __have_sse2\n-\t && is_same_v<_Tp,\n-\t\t\tdouble> && sizeof(__intrinsic_type_t<_Tp, _Np>) == 16;\n+\t && __is_x86_pd<_Tp>()\n+\t && sizeof(__intrinsic_type_t<_Tp, _Np>) == 16;\n }\n \n template \n@@ -438,8 +456,8 @@ template \n __is_avx_ps()\n {\n return __have_avx\n-\t && is_same_v<_Tp,\n-\t\t\tfloat> && sizeof(__intrinsic_type_t<_Tp, _Np>) == 32;\n+\t && __is_x86_ps<_Tp>()\n+\t && sizeof(__intrinsic_type_t<_Tp, _Np>) == 32;\n }\n \n template \n@@ -447,8 +465,8 @@ template \n __is_avx_pd()\n {\n return __have_avx\n-\t && is_same_v<_Tp,\n-\t\t\tdouble> && sizeof(__intrinsic_type_t<_Tp, _Np>) == 32;\n+\t && __is_x86_pd<_Tp>()\n+\t && sizeof(__intrinsic_type_t<_Tp, _Np>) == 32;\n }\n \n template \n@@ -456,8 +474,8 @@ template \n __is_avx512_ps()\n {\n return __have_avx512f\n-\t && is_same_v<_Tp,\n-\t\t\tfloat> && sizeof(__intrinsic_type_t<_Tp, _Np>) == 64;\n+\t && __is_x86_ps<_Tp>()\n+\t && sizeof(__intrinsic_type_t<_Tp, _Np>) == 64;\n }\n \n template \n@@ -465,8 +483,8 @@ template \n __is_avx512_pd()\n {\n return __have_avx512f\n-\t && is_same_v<_Tp,\n-\t\t\tdouble> && sizeof(__intrinsic_type_t<_Tp, _Np>) == 64;\n+\t && __is_x86_pd<_Tp>()\n+\t && sizeof(__intrinsic_type_t<_Tp, _Np>) == 64;\n }\n \n // }}}\n@@ -2397,9 +2415,9 @@ template \n \t [[maybe_unused]] const auto __yi = __to_intrin(__y);\n \t if constexpr (sizeof(__xi) == 64)\n \t {\n-\t\tif constexpr (is_same_v<_Tp, float>)\n+\t\tif constexpr (__is_x86_ps<_Tp> ())\n \t\t return _mm512_mask_cmp_ps_mask(__k1, __xi, __yi, _CMP_LT_OS);\n-\t\telse if constexpr (is_same_v<_Tp, double>)\n+\t\telse if constexpr (__is_x86_pd<_Tp> ())\n \t\t return _mm512_mask_cmp_pd_mask(__k1, __xi, __yi, _CMP_LT_OS);\n \t\telse if constexpr (is_signed_v<_Tp> && sizeof(_Tp) == 1)\n \t\t return _mm512_mask_cmplt_epi8_mask(__k1, __xi, __yi);\n@@ -2422,9 +2440,9 @@ template \n \t }\n \t else if constexpr (sizeof(__xi) == 32)\n \t {\n-\t\tif constexpr (is_same_v<_Tp, float>)\n+\t\tif constexpr (__is_x86_ps<_Tp> ())\n \t\t return _mm256_mask_cmp_ps_mask(__k1, __xi, __yi, _CMP_LT_OS);\n-\t\telse if constexpr (is_same_v<_Tp, double>)\n+\t\telse if constexpr (__is_x86_pd<_Tp> ())\n \t\t return _mm256_mask_cmp_pd_mask(__k1, __xi, __yi, _CMP_LT_OS);\n \t\telse if constexpr (is_signed_v<_Tp> && sizeof(_Tp) == 1)\n \t\t return _mm256_mask_cmplt_epi8_mask(__k1, __xi, __yi);\n@@ -2447,9 +2465,9 @@ template \n \t }\n \t else if constexpr (sizeof(__xi) == 16)\n \t {\n-\t\tif constexpr (is_same_v<_Tp, float>)\n+\t\tif constexpr (__is_x86_ps<_Tp> ())\n \t\t return _mm_mask_cmp_ps_mask(__k1, __xi, __yi, _CMP_LT_OS);\n-\t\telse if constexpr (is_same_v<_Tp, double>)\n+\t\telse if constexpr (__is_x86_pd<_Tp> ())\n \t\t return _mm_mask_cmp_pd_mask(__k1, __xi, __yi, _CMP_LT_OS);\n \t\telse if constexpr (is_signed_v<_Tp> && sizeof(_Tp) == 1)\n \t\t return _mm_mask_cmplt_epi8_mask(__k1, __xi, __yi);\n@@ -2505,9 +2523,9 @@ template \n \t [[maybe_unused]] const auto __yi = __to_intrin(__y);\n \t if constexpr (sizeof(__xi) == 64)\n \t {\n-\t\tif constexpr (is_same_v<_Tp, float>)\n+\t\tif constexpr (__is_x86_ps<_Tp> ())\n \t\t return _mm512_mask_cmp_ps_mask(__k1, __xi, __yi, _CMP_LE_OS);\n-\t\telse if constexpr (is_same_v<_Tp, double>)\n+\t\telse if constexpr (__is_x86_pd<_Tp> ())\n \t\t return _mm512_mask_cmp_pd_mask(__k1, __xi, __yi, _CMP_LE_OS);\n \t\telse if constexpr (is_signed_v<_Tp> && sizeof(_Tp) == 1)\n \t\t return _mm512_mask_cmple_epi8_mask(__k1, __xi, __yi);\n@@ -2530,9 +2548,9 @@ template \n \t }\n \t else if constexpr (sizeof(__xi) == 32)\n \t {\n-\t\tif constexpr (is_same_v<_Tp, float>)\n+\t\tif constexpr (__is_x86_ps<_Tp> ())\n \t\t return _mm256_mask_cmp_ps_mask(__k1, __xi, __yi, _CMP_LE_OS);\n-\t\telse if constexpr (is_same_v<_Tp, double>)\n+\t\telse if constexpr (__is_x86_pd<_Tp> ())\n \t\t return _mm256_mask_cmp_pd_mask(__k1, __xi, __yi, _CMP_LE_OS);\n \t\telse if constexpr (is_signed_v<_Tp> && sizeof(_Tp) == 1)\n \t\t return _mm256_mask_cmple_epi8_mask(__k1, __xi, __yi);\n@@ -2555,9 +2573,9 @@ template \n \t }\n \t else if constexpr (sizeof(__xi) == 16)\n \t {\n-\t\tif constexpr (is_same_v<_Tp, float>)\n+\t\tif constexpr (__is_x86_ps<_Tp> ())\n \t\t return _mm_mask_cmp_ps_mask(__k1, __xi, __yi, _CMP_LE_OS);\n-\t\telse if constexpr (is_same_v<_Tp, double>)\n+\t\telse if constexpr (__is_x86_pd<_Tp> ())\n \t\t return _mm_mask_cmp_pd_mask(__k1, __xi, __yi, _CMP_LE_OS);\n \t\telse if constexpr (is_signed_v<_Tp> && sizeof(_Tp) == 1)\n \t\t return _mm_mask_cmple_epi8_mask(__k1, __xi, __yi);\n@@ -5021,10 +5039,10 @@ template \n \t\t = _Abi::template _S_implicit_mask_intrin<_Tp>();\n \t\treturn 0 != __testc(__a, __b);\n \t }\n-\t else if constexpr (is_same_v<_Tp, float>)\n+\t else if constexpr (__is_x86_ps<_Tp> ())\n \t return (_mm_movemask_ps(__a) & ((1 << _Np) - 1))\n \t\t == (1 << _Np) - 1;\n-\t else if constexpr (is_same_v<_Tp, double>)\n+\t else if constexpr (__is_x86_pd<_Tp> ())\n \t return (_mm_movemask_pd(__a) & ((1 << _Np) - 1))\n \t\t == (1 << _Np) - 1;\n \t else\n@@ -5084,9 +5102,9 @@ template \n \t\telse\n \t\t return 0 == __testz(__a, __a);\n \t }\n-\t else if constexpr (is_same_v<_Tp, float>)\n+\t else if constexpr (__is_x86_ps<_Tp> ())\n \t return (_mm_movemask_ps(__a) & ((1 << _Np) - 1)) != 0;\n-\t else if constexpr (is_same_v<_Tp, double>)\n+\t else if constexpr (__is_x86_pd<_Tp> ())\n \t return (_mm_movemask_pd(__a) & ((1 << _Np) - 1)) != 0;\n \t else\n \t return (_mm_movemask_epi8(__a) & ((1 << (_Np * sizeof(_Tp))) - 1))\n@@ -5120,9 +5138,9 @@ template \n \t\telse\n \t\t return 0 != __testz(__a, __a);\n \t }\n-\t else if constexpr (is_same_v<_Tp, float>)\n+\t else if constexpr (__is_x86_ps<_Tp> ())\n \t return (__movemask(__a) & ((1 << _Np) - 1)) == 0;\n-\t else if constexpr (is_same_v<_Tp, double>)\n+\t else if constexpr (__is_x86_pd<_Tp> ())\n \t return (__movemask(__a) & ((1 << _Np) - 1)) == 0;\n \t else\n \t return (__movemask(__a) & int((1ull << (_Np * sizeof(_Tp))) - 1))\n@@ -5150,13 +5168,13 @@ template \n \t\t = _Abi::template _S_implicit_mask_intrin<_Tp>();\n \t\treturn 0 != __testnzc(__a, __b);\n \t }\n-\t else if constexpr (is_same_v<_Tp, float>)\n+\t else if constexpr (__is_x86_ps<_Tp> ())\n \t {\n \t\tconstexpr int __allbits = (1 << _Np) - 1;\n \t\tconst auto __tmp = _mm_movemask_ps(__a) & __allbits;\n \t\treturn __tmp > 0 && __tmp < __allbits;\n \t }\n-\t else if constexpr (is_same_v<_Tp, double>)\n+\t else if constexpr (__is_x86_pd<_Tp> ())\n \t {\n \t\tconstexpr int __allbits = (1 << _Np) - 1;\n \t\tconst auto __tmp = _mm_movemask_pd(__a) & __allbits;\n","prefixes":["v2"]}