{"id":2225912,"url":"http://patchwork.ozlabs.org/api/patches/2225912/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260421-qcom_spl-v3-10-efee3f76754d@seznam.cz/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260421-qcom_spl-v3-10-efee3f76754d@seznam.cz>","list_archive_url":null,"date":"2026-04-21T19:43:53","name":"[v3,10/11] qualcomm: add defconfig, env and docs for SPL on sdm845","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"9dc53adee2150b3ad3b590fad89c90e72f5f6692","submitter":{"id":77645,"url":"http://patchwork.ozlabs.org/api/people/77645/?format=json","name":"Michael Srba","email":"michael.srba@seznam.cz"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260421-qcom_spl-v3-10-efee3f76754d@seznam.cz/mbox/","series":[{"id":500886,"url":"http://patchwork.ozlabs.org/api/series/500886/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=500886","date":"2026-04-21T19:43:46","name":"Add SPL support for Qualcomm platforms, starting with sdm845","version":3,"mbox":"http://patchwork.ozlabs.org/series/500886/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2225912/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2225912/checks/","tags":{},"related":[],"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=seznam.cz header.i=@seznam.cz header.a=rsa-sha256\n header.s=szn1 header.b=kfjPricC;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=seznam.cz","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n\tdkim=pass (2048-bit key;\n secure) header.d=seznam.cz header.i=@seznam.cz header.b=\"kfjPricC\";\n\tdkim-atps=neutral","phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=seznam.cz","phobos.denx.de;\n spf=pass smtp.mailfrom=michael.srba@seznam.cz"],"Received":["from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0YLZ3nmQz1yGs\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 22 Apr 2026 06:07:50 +1000 (AEST)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 82BA9841C8;\n\tTue, 21 Apr 2026 22:07:23 +0200 (CEST)","by phobos.denx.de (Postfix, from userid 109)\n id 46B038412A; Tue, 21 Apr 2026 21:45:05 +0200 (CEST)","from mxd-1-a09.seznam.cz (mxd-1-a09.seznam.cz\n [IPv6:2a02:598:128:8a00::1000:a09])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 3162D84198\n for <u-boot@lists.denx.de>; Tue, 21 Apr 2026 21:45:01 +0200 (CEST)","from email.seznam.cz by smtpc-mxd-fd5c5cd95-bfmjc\n (smtpc-mxd-fd5c5cd95-bfmjc [2a02:598:128:8a00::1000:a09])\n id 5e2ab8a50524eccc5f8374fb; Tue, 21 Apr 2026 21:44:21 +0200 (CEST)","from [127.0.0.1] (ip-111-27.static.ccinternet.cz [147.161.27.111])\n by smtpd-relay-7c7c659656-cskk5 (szn-email-smtpd/2.0.72) with ESMTPA\n id 742367c8-7d5e-4561-a738-0e3185423286;\n Tue, 21 Apr 2026 21:44:11 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,\n RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=seznam.cz; s=szn1;\n t=1776800661; bh=YbgNa1WHyPXQ7MkoccS5CZJvqqCi23sGSD9XxtwtuZM=;\n h=From:Date:Subject:MIME-Version:Content-Type:\n Content-Transfer-Encoding:Message-Id:To:Cc;\n b=kfjPricCC63HAfzJbYbR8NMya3o1yejet62/hjTetmiDjeK4EuEgLN+98L0Hr0mxT\n hlxE/Ha3wZBrRO8Gd33i/UvWeErRBLtbZz0R8Nbv9nRMDTkQHuvptHErWIeAsmmIXI\n mvrz4/7RukYXjK03fWIWSAc+aJTVrt4Ws0TdkdoMN2WVgJEf2Mfms1BtkO4cAscL90\n H29AqtZomIrG4uhoJ3mflt8WceeDdTuZIyDQxY1aFDomoo4qzvNjohKPIpEuPdPFWh\n QmmWjLSyeaybt3bQJWU70n6+YF+2Y2y9BtH2uSsnUvD8xQ89u2LXMj28E1uUHmIhUy\n F6Ez6S5HtCfSg==","From":"michael.srba@seznam.cz","Date":"Tue, 21 Apr 2026 21:43:53 +0200","Subject":"[PATCH v3 10/11] qualcomm: add defconfig, env and docs for SPL on\n sdm845","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260421-qcom_spl-v3-10-efee3f76754d@seznam.cz>","References":"<20260421-qcom_spl-v3-0-efee3f76754d@seznam.cz>","In-Reply-To":"<20260421-qcom_spl-v3-0-efee3f76754d@seznam.cz>","To":"u-boot@lists.denx.de, Sumit Garg <sumit.garg@kernel.org>,\n u-boot-qcom@groups.io","Cc":"Tom Rini <trini@konsulko.com>,\n Ilias Apalodimas <ilias.apalodimas@linaro.org>,\n Simon Glass <sjg@chromium.org>, Sughosh Ganu <sughosh.ganu@arm.com>,\n Anshul Dalal <anshuld@ti.com>, Peng Fan <peng.fan@nxp.com>,\n Mattijs Korpershoek <mkorpershoek@kernel.org>,\n Quentin Schulz <quentin.schulz@cherry.de>,\n Heinrich Schuchardt <xypron.glpk@gmx.de>, Andrew Davis <afd@ti.com>,\n Hrushikesh Salunke <h-salunke@ti.com>,\n Dario Binacchi <dario.binacchi@amarulasolutions.com>, Ye Li <ye.li@nxp.com>,\n Andre Przywara <andre.przywara@arm.com>,\n Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>,\n Leo Yu-Chi Liang <ycliang@andestech.com>,\n Andrew Goodbody <andrew.goodbody@linaro.org>, Dhruva Gole <d-gole@ti.com>,\n Kaustabh Chakraborty <kauschluss@disroot.org>,\n Jerome Forissier <jerome.forissier@arm.com>,\n Heiko Schocher <hs@nabladev.com>,\n Marek Vasut <marek.vasut+renesas@mailbox.org>,\n Lukasz Majewski <lukma@denx.de>,\n Mateusz Kulikowski <mateusz.kulikowski@gmail.com>,\n Dinesh Maniyam <dinesh.maniyam@altera.com>,\n Neil Armstrong <neil.armstrong@linaro.org>,\n Patrice Chotard <patrice.chotard@foss.st.com>,\n Patrick Delaunay <patrick.delaunay@foss.st.com>,\n Michal Simek <michal.simek@amd.com>, Yao Zi <me@ziyao.cc>,\n Peter Korsgaard <peter@korsgaard.com>,\n Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>,\n Casey Connolly <casey.connolly@linaro.org>,\n Tingting Meng <tingting.meng@altera.com>,\n Tien Fong Chee <tien.fong.chee@altera.com>, Alice Guo <alice.guo@nxp.com>,\n George Chan <gchan9527@gmail.com>,\n Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>,\n Alexey Charkov <alchark@gmail.com>, Ronald Wahl <ronald.wahl@legrand.com>,\n Michael Trimarchi <michael@amarulasolutions.com>,\n Michael Srba <Michael.Srba@seznam.cz>","X-Mailer":"b4 0.15.1","X-Mailman-Approved-At":"Tue, 21 Apr 2026 22:07:20 +0200","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<https://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Michael Srba <Michael.Srba@seznam.cz>\n\nThe defconfig should in principle be board-agnostic. Environment\nsimply contains a dfu env specifying where to load u-boot proper\n(TEXT_BASE - 64).\n\nSigned-off-by: Michael Srba <Michael.Srba@seznam.cz>\n---\n board/qualcomm/sdm845_spl.env |   2 +\n configs/sdm845_spl_defconfig  | 138 ++++++++++++++++++++++++++++++++++++++++++\n doc/board/qualcomm/index.rst  |   1 +\n doc/board/qualcomm/spl.rst    |  91 ++++++++++++++++++++++++++++\n 4 files changed, 232 insertions(+)","diff":"diff --git a/board/qualcomm/sdm845_spl.env b/board/qualcomm/sdm845_spl.env\nnew file mode 100644\nindex 00000000000..2396d003b0c\n--- /dev/null\n+++ b/board/qualcomm/sdm845_spl.env\n@@ -0,0 +1,2 @@\n+# U-Boot proper text base - 64\n+dfu_alt_info_ram=uboot.bin ram 0x1487FFC0 0x180000\ndiff --git a/configs/sdm845_spl_defconfig b/configs/sdm845_spl_defconfig\nnew file mode 100644\nindex 00000000000..04afe282a3a\n--- /dev/null\n+++ b/configs/sdm845_spl_defconfig\n@@ -0,0 +1,138 @@\n+CONFIG_ARM=y\n+CONFIG_SKIP_LOWLEVEL_INIT=y\n+CONFIG_COUNTER_FREQUENCY=19200000\n+CONFIG_POSITION_INDEPENDENT=y\n+# CONFIG_INIT_SP_RELATIVE is not set\n+CONFIG_ARCH_SNAPDRAGON=y\n+CONFIG_TEXT_BASE=0x14880000\n+CONFIG_SYS_MALLOC_LEN=0x20000\n+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y\n+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x146bffff\n+CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000\n+CONFIG_SPL_SERIAL=y\n+CONFIG_SPL_DRIVERS_MISC=y\n+CONFIG_SPL_STACK=0x146bffff\n+CONFIG_SPL_TEXT_BASE=0x1483f000\n+CONFIG_SPL_BSS_START_ADDR=0x14680000\n+CONFIG_SPL_BSS_MAX_SIZE=0x2000\n+CONFIG_SYS_BOOTM_LEN=0x4000000\n+CONFIG_SYS_LOAD_ADDR=0x0\n+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000\n+CONFIG_TARGET_SDM845=y\n+CONFIG_SPL=y\n+CONFIG_SPL_PAYLOAD=\"u-boot.img\"\n+CONFIG_SKIP_RELOCATE=y\n+# CONFIG_EFI_LOADER is not set\n+CONFIG_OF_BOARD_SETUP=y\n+CONFIG_USE_PREBOOT=y\n+CONFIG_CONSOLE_RECORD=y\n+CONFIG_CONSOLE_RECORD_OUT_SIZE=0xA000\n+CONFIG_CONSOLE_RECORD_OUT_SIZE_F=0xA000\n+CONFIG_LOGLEVEL=9\n+CONFIG_SYS_STDIO_DEREGISTER=y\n+CONFIG_LOG_MAX_LEVEL=9\n+CONFIG_SPL_LOG=y\n+CONFIG_SPL_LOG_MAX_LEVEL=9\n+# CONFIG_DISPLAY_CPUINFO is not set\n+CONFIG_SPL_MAX_SIZE=0x7ffc0\n+CONFIG_SPL_PAD_TO=0x0\n+CONFIG_SPL_REMAKE_ELF_LDSCRIPT=\"arch/arm/mach-snapdragon/u-boot-spl-elf-sdm845.lds\"\n+CONFIG_SPL_DMA=y\n+CONFIG_SPL_REMAKE_ELF=y\n+CONFIG_SPL_DM_RESET=y\n+CONFIG_SPL_POWER_DOMAIN=y\n+CONFIG_BOOTM_NETBSD=y\n+CONFIG_CMD_CLK=y\n+CONFIG_CMD_DFU=y\n+CONFIG_CMD_GPIO=y\n+CONFIG_CMD_I2C=y\n+CONFIG_CMD_MMC=y\n+CONFIG_CMD_UFS=y\n+CONFIG_CMD_CAT=y\n+CONFIG_CMD_RNG=y\n+CONFIG_CMD_REGULATOR=y\n+CONFIG_CMD_LOG=y\n+CONFIG_OF_UPSTREAM_BUILD_VENDOR=y\n+CONFIG_ENV_USE_DEFAULT_ENV_TEXT_FILE=y\n+CONFIG_ENV_DEFAULT_ENV_TEXT_FILE=\"board/qualcomm/sdm845_spl.env\"\n+CONFIG_NET_RANDOM_ETHADDR=y\n+# CONFIG_OFNODE_MULTI_TREE is not set\n+CONFIG_BUTTON_QCOM_PMIC=y\n+CONFIG_CLK=y\n+CONFIG_SPL_CLK=y\n+CONFIG_CLK_STUB=y\n+CONFIG_SPL_CLK_STUB=y\n+CONFIG_CLK_QCOM_SDM845=y\n+CONFIG_DFU_MMC=y\n+CONFIG_DFU_RAM=y\n+CONFIG_DFU_SCSI=y\n+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000\n+CONFIG_DMA=y\n+CONFIG_DMA_CHANNELS=y\n+CONFIG_USB_FUNCTION_FASTBOOT=y\n+CONFIG_FASTBOOT_BUF_ADDR=0xdeadbeef\n+CONFIG_MSM_GPIO=y\n+CONFIG_QCOM_PMIC_GPIO=y\n+CONFIG_DM_I2C=y\n+CONFIG_SYS_I2C_QUP=y\n+CONFIG_I2C_MUX=y\n+CONFIG_IOMMU=y\n+CONFIG_QCOM_HYP_SMMU=y\n+CONFIG_MISC=y\n+CONFIG_NVMEM=y\n+CONFIG_I2C_EEPROM=y\n+CONFIG_MMC_SDHCI=y\n+CONFIG_MMC_SDHCI_ADMA=y\n+CONFIG_MMC_SDHCI_MSM=y\n+CONFIG_DM_ETH_PHY=y\n+CONFIG_PHY=y\n+CONFIG_SPL_PHY=y\n+CONFIG_PHY_QCOM_QMP_UFS=y\n+CONFIG_PHY_QCOM_QUSB2=y\n+CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y\n+CONFIG_PHY_QCOM_SNPS_EUSB2=y\n+CONFIG_PHY_QCOM_USB_HS_28NM=y\n+CONFIG_PHY_QCOM_USB_SS=y\n+CONFIG_PINCTRL=y\n+CONFIG_PINCONF=y\n+CONFIG_PINCTRL_QCOM_APQ8016=y\n+CONFIG_PINCTRL_QCOM_APQ8096=y\n+CONFIG_PINCTRL_QCOM_QCM2290=y\n+CONFIG_PINCTRL_QCOM_QCS404=y\n+CONFIG_PINCTRL_QCOM_SDM845=y\n+CONFIG_PINCTRL_QCOM_SM6115=y\n+CONFIG_PINCTRL_QCOM_SM8250=y\n+CONFIG_PINCTRL_QCOM_SM8550=y\n+CONFIG_PINCTRL_QCOM_SM8650=y\n+CONFIG_PINCTRL_QCOM_X1E80100=y\n+CONFIG_DM_PMIC=y\n+CONFIG_PMIC_QCOM=y\n+CONFIG_DM_REGULATOR=y\n+CONFIG_DM_REGULATOR_FIXED=y\n+CONFIG_DM_REGULATOR_QCOM_RPMH=y\n+CONFIG_DM_RNG=y\n+CONFIG_RNG_MSM=y\n+CONFIG_SCSI=y\n+CONFIG_MSM_SERIAL=y\n+CONFIG_SOC_QCOM=y\n+CONFIG_QCOM_COMMAND_DB=y\n+CONFIG_QCOM_RPMH=y\n+CONFIG_SPL_SPMI=y\n+CONFIG_SPMI_MSM=y\n+CONFIG_SYSINFO=y\n+CONFIG_SYSINFO_SMBIOS=y\n+CONFIG_SYSRESET_QCOM_PSHOLD=y\n+CONFIG_USB=y\n+CONFIG_USB_DWC3=y\n+CONFIG_USB_DWC3_GENERIC=y\n+CONFIG_SPL_USB_DWC3_GENERIC=y\n+CONFIG_USB_GADGET=y\n+CONFIG_USB_GADGET_VENDOR_NUM=0x0525\n+CONFIG_USB_GADGET_PRODUCT_NUM=0xb4a4\n+CONFIG_USB_ETHER=y\n+CONFIG_USB_ETH_CDC=y\n+CONFIG_SPL_DFU=y\n+CONFIG_SPL_USB_SDP_SUPPORT=y\n+CONFIG_UFS=y\n+# CONFIG_SPL_USE_TINY_PRINTF is not set\n+CONFIG_CIRCBUF=y\ndiff --git a/doc/board/qualcomm/index.rst b/doc/board/qualcomm/index.rst\nindex 3238a68e859..65e3e222f68 100644\n--- a/doc/board/qualcomm/index.rst\n+++ b/doc/board/qualcomm/index.rst\n@@ -14,3 +14,4 @@ Qualcomm\n    iq8\n    phones\n    rdp\n+   spl\ndiff --git a/doc/board/qualcomm/spl.rst b/doc/board/qualcomm/spl.rst\nnew file mode 100644\nindex 00000000000..96f9cc6c0e8\n--- /dev/null\n+++ b/doc/board/qualcomm/spl.rst\n@@ -0,0 +1,91 @@\n+.. SPDX-License-Identifier: GPL-2.0+\n+.. sectionauthor:: Michael Srba <Michael.Srba@seznam.cz>\n+\n+===================================\n+Booting U-Boot SPL on Qualcomm SoCs\n+===================================\n+\n+Overview\n+--------\n+The boot process on sdm845 (and some other Qualcomm SoCs) starts with the bootrom\n+of the Application Processor, which executes XBL_SEC, which jumps to \"OEM\" code\n+in EL1. Production devices are typically \"fused\", with a hash of the OEM's signing\n+key burnt into one of the \"QFUSE\" banks on the SoC making it impossible to run\n+custom bootloader code. As a result U-Boot SPL is only supported on unfused\n+(\"secureboot off\") devices. XBL_SEC is always signed by Qualcomm, and the fuses\n+to disable turning off signature verification for it are always burnt at the\n+factory, so replacing XBL_SEC is impossible without using JTAG. Of course JTAG\n+is typically disabled on devices that have secure boot enabled, or at minimum\n+greatly neutered.\n+\n+U-Boot SPL for Qualcomm platforms uses a custom linker script (per SoC) to build a bootable ELF.\n+For sdm845 (and some other platforms) this has two sections, u-boot code and an embedded\n+xbl_sec elf (signed by qualcomm). To boot on an unfused SoC, the elf additionally\n+needs to have hash sections added, which can be accomplished with qtestsign.\n+\n+Currently, sdm845 is supported. You need a device with secure boot disabled\n+(or with secure boot enabled if you enabled it yourself and have the private key,\n+though for full security you'd also want to disable JTAG which will remove your ability\n+to mess with the control flow in the bootrom (immutable) and in XBL_SEC (signed)).\n+\n+Building\n+--------\n+First, obtain an xbl_sec that includes the EL3 privilege escalation feature\n+and place it at .output/xbl_sec.elf. You can extract it from an xbl elf.\n+If you're unable to find one, you can also use JTAG/SWD to break at the SMC\n+entry and use gdb to jump to the u-boot entry point in EL3.\n+\n+To build a bootable image, you need to use a defconfig specific to your SoC.\n+This is because the ELF has to specify where in the address space to put u-boot SPL,\n+and this may differ per SoC. There may be other SoC-dependent build time choices,\n+though in principle those could be made at runtime.\n+\n+First run ``make sdm845_spl_defconfig``::\n+\n+\tmake CROSS_COMPILE=aarch64-suse-linux- O=.output DEVICE_TREE=qcom/sdm845-shift-axolotl sdm845_spl_defconfig\n+\n+Then compile u-boot and specify the dts for your board (technically nothing about the resulting\n+SPL image should be board-specific, but there are no non-board-specific device trees in Linux)::\n+\n+\tmake CROSS_COMPILE=aarch64-suse-linux- O=.output DEVICE_TREE=qcom/sdm845-shift-axolotl\n+\n+Finally, use ``qtestsign`` to add the hash segments required by PBL::\n+\n+\tqtestsign -v 5 -o .output/spl/u-boot-spl_signed.elf prog .output/spl/u-boot-spl.elf\n+\n+Running\n+-------\n+Currently, U-Boot SPL for qualcomm platforms expects to be booted via EDL::\n+\n+\tedl.py --loader=$PWD/.output/spl/u-boot-spl_signed.elf\n+\n+SPL will then launch the DFU gadget and wait for you to upload u-boot proper::\n+\n+\tdfu-util -RD .output/u-boot.img\n+\n+u-boot proper will then likely crash, since SPL currently doesn't init DRAM on qualcomm platforms\n+and u-boot proper currently doesn't support running from SRAM. The latter should be an easy fix.\n+\n+Notes on memory map\n+-------------------\n+| There are various banks of SRAM on a Qualcomm SoC that we can use prior to DRAM init.\n+| For example:\n+| msm8916 - 512K L2-as-TCM (at ``0x08000000``), 16K OCIMEM (at ``0x08600000``)\n+| msm8998 - 1M L2-as-TCM (at ``0x14000000``), 256K OCIMEM (at ``0x14680000``)\n+| sdm845 - 1.5M BOOT_IMEM (at ``0x14800000``), 256K OCIMEM (at ``0x14680000``)\n+\n+There's also RPM code/data RAM and hexagon TCMs, but unless we want to boot dram-less Linux\n+we can probably safely ignore those. On msm8916 they may come in handy though.\n+\n+sdm845 can also have 8M LLCC-as-TCM in theory, but this appears to be broken.\n+L2-as-TCM is no longer present.\n+\n+Since a limited amount of not necessarily continuous SRAM is available, we need to manually\n+specify where .text, .bss, the malloc pool and the stack go. The Kconfig contains reasonable\n+defaults per SoC.\n+\n+On sdm845, we by default put U-Boot SPL in BOOT_IMEM, with .bss, malloc pool and the stack\n+filling OCIMEM. We can also fit U-Boot proper in BOOT_IMEM, for dram-less DFU or peek/poke\n+with a shell. To that end, we set ``CONFIG_TEXT_BASE`` at 512K into BOOT_IMEM, and set\n+``CONFIG_SPL_MAX_SIZE`` to 512K - 64. We also configure dfu to load U-Boot proper\n+to ``CONFIG_TEXT_BASE`` - 64. (64 bytes is the size of u-boot legacy header)\n","prefixes":["v3","10/11"]}