{"id":2225434,"url":"http://patchwork.ozlabs.org/api/patches/2225434/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260421-iommu_map_sgtable-return-v1-4-fb484c07d2a1@nvidia.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260421-iommu_map_sgtable-return-v1-4-fb484c07d2a1@nvidia.com>","list_archive_url":null,"date":"2026-04-21T04:02:39","name":"[4/4] media: nvidia: tegra-vde: Fix iommu_map_sgtable() return value check","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f32b2fdb1539deb3da4f4c4eda35c93fb245cd6e","submitter":{"id":26499,"url":"http://patchwork.ozlabs.org/api/people/26499/?format=json","name":"Mikko Perttunen","email":"mperttunen@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260421-iommu_map_sgtable-return-v1-4-fb484c07d2a1@nvidia.com/mbox/","series":[{"id":500722,"url":"http://patchwork.ozlabs.org/api/series/500722/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=500722","date":"2026-04-21T04:02:35","name":"Fix checking of iommu_map_sgtable return value","version":1,"mbox":"http://patchwork.ozlabs.org/series/500722/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2225434/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2225434/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com 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a6529000-a038-4bb4-f841-08de9f5b0676","X-MS-Exchange-CrossTenant-AuthSource":"SJ2PR12MB9161.namprd12.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"21 Apr 2026 04:04:03.4222\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n jZQ/ORAc2I5Gl2vTt7aKoDo8w+c1b6kAecOjlz6+cVM5+zrCWvEHFwXUmUQWQofU012BGNkRwTDScQGPuZP6ng==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"PH7PR12MB7985"},"content":"Commit \"iommu: return full error code from iommu_map_sg[_atomic]()\"\nchanged iommu_map_sgtable() to return an ssize_t and negative values\nin error cases, rather than a size_t and a zero.\n\nUpdate tegra_vde_iommu_map() to correctly check for errors from\niommu_map_sgtable.\n\nFixes: ad8f36e4b6b1 (\"iommu: return full error code from iommu_map_sg[_atomic]()\")\nSigned-off-by: Mikko Perttunen \n---\n drivers/media/platform/nvidia/tegra-vde/iommu.c | 9 +++++----\n 1 file changed, 5 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/media/platform/nvidia/tegra-vde/iommu.c b/drivers/media/platform/nvidia/tegra-vde/iommu.c\nindex b1d9d841d944..824d2aa80a43 100644\n--- a/drivers/media/platform/nvidia/tegra-vde/iommu.c\n+++ b/drivers/media/platform/nvidia/tegra-vde/iommu.c\n@@ -25,6 +25,7 @@ int tegra_vde_iommu_map(struct tegra_vde *vde,\n \tunsigned long shift;\n \tunsigned long end;\n \tdma_addr_t addr;\n+\tssize_t map_err;\n \n \tend = vde->domain->geometry.aperture_end;\n \tsize = iova_align(&vde->iova, size);\n@@ -36,11 +37,11 @@ int tegra_vde_iommu_map(struct tegra_vde *vde,\n \n \taddr = iova_dma_addr(&vde->iova, iova);\n \n-\tsize = iommu_map_sgtable(vde->domain, addr, sgt,\n-\t\t\t\t IOMMU_READ | IOMMU_WRITE);\n-\tif (!size) {\n+\tmap_err = iommu_map_sgtable(vde->domain, addr, sgt,\n+\t\t\t\t IOMMU_READ | IOMMU_WRITE);\n+\tif (map_err < 0) {\n \t\t__free_iova(&vde->iova, iova);\n-\t\treturn -ENXIO;\n+\t\treturn map_err;\n \t}\n \n \t*iovap = iova;\n","prefixes":["4/4"]}