{"id":2225428,"url":"http://patchwork.ozlabs.org/api/patches/2225428/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20260421032029.789026-1-hongtao.liu@intel.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260421032029.789026-1-hongtao.liu@intel.com>","list_archive_url":null,"date":"2026-04-21T03:20:29","name":"[v2] optabs: Don't add REG_EQUAL notes with non-read-only MEMs [PR124894]","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"c38732a2b9f873c3a7182c9c9116e912a11a6c9e","submitter":{"id":79166,"url":"http://patchwork.ozlabs.org/api/people/79166/?format=json","name":"liuhongt","email":"hongtao.liu@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20260421032029.789026-1-hongtao.liu@intel.com/mbox/","series":[{"id":500720,"url":"http://patchwork.ozlabs.org/api/series/500720/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=500720","date":"2026-04-21T03:20:29","name":"[v2] optabs: Don't add REG_EQUAL notes with non-read-only MEMs [PR124894]","version":2,"mbox":"http://patchwork.ozlabs.org/series/500720/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2225428/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2225428/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=a6Lb48/y;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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a=\"81536685\"","E=Sophos;i=\"6.23,190,1770624000\"; d=\"scan'208\";a=\"81536685\"","E=Sophos;i=\"6.23,190,1770624000\"; d=\"scan'208\";a=\"225422224\""],"X-ExtLoop1":"1","From":"liuhongt ","To":"gcc-patches@gcc.gnu.org","Cc":"andrew.pinski@oss.qualcomm.com, ebotcazou@libertysurf.fr,\n rguenther@suse.de","Subject":"[PATCH v2] optabs: Don't add REG_EQUAL notes with non-read-only MEMs\n [PR124894]","Date":"Mon, 20 Apr 2026 20:20:29 -0700","Message-Id":"<20260421032029.789026-1-hongtao.liu@intel.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"\n ","References":"\n ","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":">Drea Pinski 2026-04-17 23:53:17 UTC\n>I think the REG_EQUAL is created via add_equal_note in optabs.cc.\n>That should check for MEM in op0/op1 and not add the REG_EQUAL.\n\nUpdate in V2, Don't add REG_EQUAL notes with non-read-only MEMs.\nPerformance impact on SPEC2017/SPEC2026 is negligible.\nBootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}\nOk for trunk?\n\n\n\n\n\nDSE can forward-substitute a stored value into a load and then delete\nthe store as dead. This leaves REG_EQUAL notes on other insns that\nreference the same memory location stale, since the memory now holds\na different (older) value.\n\nWhen late-combine propagates a register source into such a stale\nREG_EQUAL note, the note can end up with two identical MEM references\n(e.g. (minus (mem[X]) (mem[X]))) that simplify_binary_operation folds\nto zero. IRA then promotes REG_EQUAL(0) to REG_EQUIV(0), and reload\neliminates the computation entirely, producing wrong code.\n\nFix this by not creating REG_EQUAL notes that reference non-read-only\nMEMs in add_equal_note. Read-only MEMs (such as constant pool\nreferences) are safe since their contents cannot change. REG_EQUAL\nnotes are just optimization hints, so not adding them is always safe.\n\ngcc/ChangeLog:\n\n\tPR rtl-optimization/124894\n\t* optabs.cc (add_equal_note): Don't add REG_EQUAL notes\n\twhen operands reference non-read-only MEMs.\n\ngcc/testsuite/ChangeLog:\n\n\tPR rtl-optimization/124894\n\t* gcc.dg/pr124894.c: New test.\n---\n gcc/optabs.cc | 9 +++++++++\n gcc/testsuite/gcc.dg/pr124894.c | 36 +++++++++++++++++++++++++++++++++\n 2 files changed, 45 insertions(+)\n create mode 100644 gcc/testsuite/gcc.dg/pr124894.c","diff":"diff --git a/gcc/optabs.cc b/gcc/optabs.cc\nindex 111b9be9913..0e314d61ec2 100644\n--- a/gcc/optabs.cc\n+++ b/gcc/optabs.cc\n@@ -135,6 +135,15 @@ add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0,\n \t || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))\n return true;\n \n+ /* Avoid creating REG_EQUAL notes that reference non-invariant MEMs.\n+ Such notes can become stale if an earlier store to the same MEM is\n+ later deleted (e.g. by DSE), causing the MEM to hold a different\n+ value than what the note assumes. Downstream passes may then\n+ produce incorrect simplifications from the stale note. */\n+ if ((MEM_P (op0) && rtx_varies_p (op0, 0))\n+ || (op1 && MEM_P (op1) && rtx_varies_p (op1, 0)))\n+ return true;\n+\n if (GET_RTX_CLASS (code) == RTX_UNARY)\n switch (code)\n {\ndiff --git a/gcc/testsuite/gcc.dg/pr124894.c b/gcc/testsuite/gcc.dg/pr124894.c\nnew file mode 100644\nindex 00000000000..f906169c699\n--- /dev/null\n+++ b/gcc/testsuite/gcc.dg/pr124894.c\n@@ -0,0 +1,36 @@\n+/* { dg-do run } */\n+/* { dg-require-effective-target int128 } */\n+/* { dg-require-effective-target lp64 } */\n+/* { dg-options \"-O2 -fno-strict-aliasing\" } */\n+\n+/* PR rtl-optimization/124894 */\n+/* DSE can delete a store after forward-substituting the stored value into\n+ a load, leaving a stale MEM in a REG_EQUAL note. Late-combine must not\n+ propagate into such notes, as the resulting simplification (e.g.\n+ (minus (mem) (mem)) -> 0) would be wrong. */\n+\n+short s;\n+__int128 z;\n+long g;\n+\n+__attribute__((noipa)) long\n+foo (short a)\n+{\n+ long t = 0;\n+ char c = *(char *) __builtin_memset (&z, 2, 6);\n+ __builtin_memset (&s, c, 2);\n+ __builtin_memmove (&t, &g, 4);\n+ long u = -t;\n+ long v = *(long *) __builtin_memset (&t, a | 6, 8);\n+ __int128 w = z % s;\n+ long r = w + t + u + v;\n+ return r;\n+}\n+\n+int\n+main ()\n+{\n+ long x = foo (0);\n+ if (x != 0x0c0c0c0c0c0c0c0c)\n+ __builtin_abort ();\n+}\n","prefixes":["v2"]}