{"id":2224872,"url":"http://patchwork.ozlabs.org/api/patches/2224872/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pwm/patch/20260419080838.3192357-1-sangyun.kim@snu.ac.kr/","project":{"id":38,"url":"http://patchwork.ozlabs.org/api/projects/38/?format=json","name":"Linux PWM development","link_name":"linux-pwm","list_id":"linux-pwm.vger.kernel.org","list_email":"linux-pwm@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260419080838.3192357-1-sangyun.kim@snu.ac.kr>","list_archive_url":null,"date":"2026-04-19T08:08:38","name":"[v2] pwm: atmel-tcb: Cache clock rates and mark chip as atomic","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"a6f522f7870eb22e203a3e0a8fd107a3a6432edd","submitter":{"id":93159,"url":"http://patchwork.ozlabs.org/api/people/93159/?format=json","name":"Sangyun Kim","email":"sangyun.kim@snu.ac.kr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pwm/patch/20260419080838.3192357-1-sangyun.kim@snu.ac.kr/mbox/","series":[{"id":500485,"url":"http://patchwork.ozlabs.org/api/series/500485/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pwm/list/?series=500485","date":"2026-04-19T08:08:38","name":"[v2] pwm: atmel-tcb: Cache clock rates and mark chip as atomic","version":2,"mbox":"http://patchwork.ozlabs.org/series/500485/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224872/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224872/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pwm@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=snu.ac.kr header.i=@snu.ac.kr header.a=rsa-sha256\n header.s=google header.b=jNa41cP5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pwm+bounces-8632-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=snu.ac.kr header.i=@snu.ac.kr\n header.b=\"jNa41cP5\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.215.176","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=snu.ac.kr","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=snu.ac.kr"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fz1V40ml5z1yD4\n\tfor ; Sun, 19 Apr 2026 18:08:59 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 4B0FE3016494\n\tfor ; Sun, 19 Apr 2026 08:08:56 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 452FE33CEA8;\n\tSun, 19 Apr 2026 08:08:53 +0000 (UTC)","from mail-pg1-f176.google.com (mail-pg1-f176.google.com\n [209.85.215.176])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 34BE930F53C\n\tfor ; Sun, 19 Apr 2026 08:08:49 +0000 (UTC)","by mail-pg1-f176.google.com with SMTP id\n 41be03b00d2f7-c7973bbc16dso1385261a12.0\n for ; Sun, 19 Apr 2026 01:08:49 -0700 (PDT)","from nunu.. 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This keeps the spinlock-based mutual exclusion\nintroduced in commit 37f7707077f5 (\"pwm: atmel-tcb: Fix race condition\nand convert to guards\") and removes the sleeping calls from the atomic\nsection.\n\nWith no sleeping calls left in .apply() and the regmap-mmio bus already\nrunning with fast_io=true, also mark the chip as atomic so consumers\ncan use pwm_apply_atomic() from atomic context.\n\nFixes: 37f7707077f5 (\"pwm: atmel-tcb: Fix race condition and convert to guards\")\nSigned-off-by: Sangyun Kim \n---\nHi Uwe,\n\nThanks for the review! \"Sangyun\" is the right form to address me, no\nworries.\n\nChanges in v2:\n - Keep the spinlock instead of converting tcbpwmc->lock to a mutex.\n - Cache clk and slow_clk rates at probe via clk_rate_exclusive_get()\n so the .apply() path no longer calls clk_get_rate() under the\n spinlock.\n - Mark the chip as atomic now that .apply() has no sleeping calls.\n\nThanks,\nSangyun\n\n drivers/pwm/pwm-atmel-tcb.c | 28 +++++++++++++++++++++++++---\n 1 file changed, 25 insertions(+), 3 deletions(-)","diff":"diff --git a/drivers/pwm/pwm-atmel-tcb.c b/drivers/pwm/pwm-atmel-tcb.c\nindex f9a9c12cbcdd..8d46ce28f736 100644\n--- a/drivers/pwm/pwm-atmel-tcb.c\n+++ b/drivers/pwm/pwm-atmel-tcb.c\n@@ -50,6 +50,8 @@ struct atmel_tcb_pwm_chip {\n \tspinlock_t lock;\n \tu8 channel;\n \tu8 width;\n+\tunsigned long rate;\n+\tunsigned long slow_rate;\n \tstruct regmap *regmap;\n \tstruct clk *clk;\n \tstruct clk *gclk;\n@@ -266,7 +268,7 @@ static int atmel_tcb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,\n \tint slowclk = 0;\n \tunsigned period;\n \tunsigned duty;\n-\tunsigned rate = clk_get_rate(tcbpwmc->clk);\n+\tunsigned long rate = tcbpwmc->rate;\n \tunsigned long long min;\n \tunsigned long long max;\n \n@@ -294,7 +296,7 @@ static int atmel_tcb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,\n \t */\n \tif (i == ARRAY_SIZE(atmel_tcb_divisors)) {\n \t\ti = slowclk;\n-\t\trate = clk_get_rate(tcbpwmc->slow_clk);\n+\t\trate = tcbpwmc->slow_rate;\n \t\tmin = div_u64(NSEC_PER_SEC, rate);\n \t\tmax = min << tcbpwmc->width;\n \n@@ -431,6 +433,7 @@ static int atmel_tcb_pwm_probe(struct platform_device *pdev)\n \t}\n \n \tchip->ops = &atmel_tcb_pwm_ops;\n+\tchip->atomic = true;\n \ttcbpwmc->channel = channel;\n \ttcbpwmc->width = config->counter_width;\n \n@@ -438,16 +441,33 @@ static int atmel_tcb_pwm_probe(struct platform_device *pdev)\n \tif (err)\n \t\tgoto err_gclk;\n \n+\terr = clk_rate_exclusive_get(tcbpwmc->clk);\n+\tif (err)\n+\t\tgoto err_disable_clk;\n+\n+\terr = clk_rate_exclusive_get(tcbpwmc->slow_clk);\n+\tif (err)\n+\t\tgoto err_clk_unlock;\n+\n+\ttcbpwmc->rate = clk_get_rate(tcbpwmc->clk);\n+\ttcbpwmc->slow_rate = clk_get_rate(tcbpwmc->slow_clk);\n+\n \tspin_lock_init(&tcbpwmc->lock);\n \n \terr = pwmchip_add(chip);\n \tif (err < 0)\n-\t\tgoto err_disable_clk;\n+\t\tgoto err_slow_clk_unlock;\n \n \tplatform_set_drvdata(pdev, chip);\n \n \treturn 0;\n \n+err_slow_clk_unlock:\n+\tclk_rate_exclusive_put(tcbpwmc->slow_clk);\n+\n+err_clk_unlock:\n+\tclk_rate_exclusive_put(tcbpwmc->clk);\n+\n err_disable_clk:\n \tclk_disable_unprepare(tcbpwmc->slow_clk);\n \n@@ -470,6 +490,8 @@ static void atmel_tcb_pwm_remove(struct platform_device *pdev)\n \n \tpwmchip_remove(chip);\n \n+\tclk_rate_exclusive_put(tcbpwmc->slow_clk);\n+\tclk_rate_exclusive_put(tcbpwmc->clk);\n \tclk_disable_unprepare(tcbpwmc->slow_clk);\n \tclk_put(tcbpwmc->gclk);\n \tclk_put(tcbpwmc->clk);\n","prefixes":["v2"]}