{"id":2224206,"url":"http://patchwork.ozlabs.org/api/patches/2224206/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>","list_archive_url":null,"date":"2026-04-17T02:26:05","name":"[v2,1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"5182979b7341a75cd6ec1d4131d0dce59d9cb759","submitter":{"id":66993,"url":"http://patchwork.ozlabs.org/api/people/66993/?format=json","name":"Shawn Lin","email":"shawn.lin@rock-chips.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com/mbox/","series":[{"id":500223,"url":"http://patchwork.ozlabs.org/api/series/500223/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=500223","date":"2026-04-17T02:26:06","name":"Add Devres managed IRQ vectors allocation","version":2,"mbox":"http://patchwork.ozlabs.org/series/500223/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224206/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224206/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=rock-chips.com header.i=@rock-chips.com\n header.a=rsa-sha256 header.s=default header.b=OXkUKeNI;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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t=1776397353; c=relaxed/simple;\n\tbh=9ITrv80iyejeDZV2huUwR48BTZzvMywKxp5Rm/kU+pc=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References;\n b=IzZu4LBMqII67BfszBb7tsAdsAsDghp59iWFxT2Wi8qVvtlht8C391TfoAi+URh1WI91rwD+MjQhjQYlWwx5cNz0LmA8vVmGKC83DzjifL+BtER8oRw3auATHCtt8eA+xdFLdR3BUcg3kDnCm7oOaaxlixuYN7Cfdww+N/4yO14=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com;\n spf=pass smtp.mailfrom=rock-chips.com;\n dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=OXkUKeNI; arc=none smtp.client-ip=220.197.32.80","From":"Shawn Lin ","To":"Bjorn Helgaas ","Cc":"Nirmal Patel ,\n\tJonathan Derrick ,\n\tKurt Schwemmer ,\n\tLogan Gunthorpe ,\n\tPhilipp Stanner ,\n\tlinux-pci@vger.kernel.org,\n\tShawn Lin ","Subject":"[PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","Date":"Fri, 17 Apr 2026 10:26:05 +0800","Message-Id":"<1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1776392767-83668-1-git-send-email-shawn.lin@rock-chips.com>","References":"<1776392767-83668-1-git-send-email-shawn.lin@rock-chips.com>","X-HM-Tid":"0a9d99430ef609cckunm63489ccb2f7434","X-HM-MType":"1","X-HM-Spam-Status":"e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly\n\ttZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGhoYSVYeTx1MQ0lNQk0dGUhWFRQJFh\n\toXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0\n\thVSktLVUpCS0tZBg++","DKIM-Signature":"a=rsa-sha256;\n\tb=OXkUKeNIk35zFiF4hTY8FMM5N6WoHAfEG/vkz7gECfe/YnfRcCDmsZKVAU9pySPFjBMdrIKxLYh5ofyrfwfImUAmgo/Oq3AvgJjn73FJy40Yc+0BPWyMF+dIlADchPBXK5EpKisAY1QiX7r6U67IaWKiBHJWcSflQX/ZrfP4tbk=;\n c=relaxed/relaxed; s=default; d=rock-chips.com; v=1;\n\tbh=eyfqmoHR3fotEgixzCzTpdRmQvA3RmfAmT0sWYcvMIs=;\n\th=date:mime-version:subject:message-id:from;","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":""},"content":"pcim_alloc_irq_vectors() and pcim_alloc_irq_vectors_affinity() are created for\npci device drivers which rely on the devres machinery to help cleanup the IRQ\nvectors.\n\nSigned-off-by: Shawn Lin \n\n---\n\nChanges in v2: None\n\n drivers/pci/msi/api.c | 26 ++++++++++++++++++++++++++\n include/linux/pci.h | 22 ++++++++++++++++++++++\n 2 files changed, 48 insertions(+)","diff":"diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c\nindex c18559b..2362fca 100644\n--- a/drivers/pci/msi/api.c\n+++ b/drivers/pci/msi/api.c\n@@ -297,6 +297,32 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity);\n \n /**\n+ * pcim_alloc_irq_vectors() - devres managed pci_alloc_irq_vectors()\n+ * Interrupt vectors are automatically freed by the devres machinery\n+ */\n+int pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n+\t\t\t unsigned int max_vecs, unsigned int flags)\n+{\n+\treturn pcim_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n+\t\t\t\t\t flags, NULL);\n+}\n+EXPORT_SYMBOL(pcim_alloc_irq_vectors);\n+\n+/**\n+ * pcim_alloc_irq_vectors_affinity() - devres managed pci_alloc_irq_vectors_affinity()\n+ * Interrupt vectors are automatically freed by the devres machinery\n+ */\n+int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n+\t\t\t\t unsigned int max_vecs, unsigned int flags,\n+\t\t\t\t struct irq_affinity *affd)\n+{\n+\tdev->is_msi_managed = true;\n+\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n+\t\t\t\t\t flags, affd);\n+}\n+EXPORT_SYMBOL(pcim_alloc_irq_vectors_affinity);\n+\n+/**\n * pci_irq_vector() - Get Linux IRQ number of a device interrupt vector\n * @dev: the PCI device to operate on\n * @nr: device-relative interrupt vector index (0-based); has different\ndiff --git a/include/linux/pci.h b/include/linux/pci.h\nindex 2c44545..3716c67 100644\n--- a/include/linux/pci.h\n+++ b/include/linux/pci.h\n@@ -1770,6 +1770,12 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n \t\t\t\t unsigned int max_vecs, unsigned int flags,\n \t\t\t\t struct irq_affinity *affd);\n \n+int pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n+\t\t\t unsigned int max_vecs, unsigned int flags);\n+int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n+\t\t\t\t unsigned int max_vecs, unsigned int flags,\n+\t\t\t\t struct irq_affinity *affd);\n+\n bool pci_msix_can_alloc_dyn(struct pci_dev *dev);\n struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n \t\t\t\t const struct irq_affinity_desc *affdesc);\n@@ -1812,6 +1818,22 @@ pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n \t\t\t\t\t flags, NULL);\n }\n \n+static inline int\n+pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n+\t\t\t unsigned int max_vecs, unsigned int flags,\n+\t\t\t struct irq_affinity *aff_desc)\n+{\n+\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n+\t\t\t\t\t flags, aff_desc);\n+}\n+static inline int\n+pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n+\t\t unsigned int max_vecs, unsigned int flags)\n+{\n+\treturn pcim_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n+\t\t\t\t\t flags, NULL);\n+}\n+\n static inline bool pci_msix_can_alloc_dyn(struct pci_dev *dev)\n { return false; }\n static inline struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n","prefixes":["v2","1/3"]}