{"id":2224204,"url":"http://patchwork.ozlabs.org/api/patches/2224204/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260417033439.318930-1-ynorov@nvidia.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260417033439.318930-1-ynorov@nvidia.com>","list_archive_url":null,"date":"2026-04-17T03:34:38","name":"gpio: drop bitmap_complement() where feasible","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"351c9b2ac706ed6849102874521478cd9ec0db1c","submitter":{"id":92516,"url":"http://patchwork.ozlabs.org/api/people/92516/?format=json","name":"Yury Norov","email":"ynorov@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260417033439.318930-1-ynorov@nvidia.com/mbox/","series":[{"id":500229,"url":"http://patchwork.ozlabs.org/api/series/500229/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=500229","date":"2026-04-17T03:34:38","name":"gpio: drop bitmap_complement() where feasible","version":1,"mbox":"http://patchwork.ozlabs.org/series/500229/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224204/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224204/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-gpio+bounces-35202-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) 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header.d=nvidia.com; arc=none"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=dCER12a8AX4KI+qktc+coveVq7UcxKaCuFiBXc8NcHM=;\n b=CgTE3UV7pPNNsImIRks+qkS7eCOo/pq6DvkdkUEXQbGYnu9MaPi768Bs7SKp2BYWT6+UoUQGBv9QinOYTbo+wVWpn4L4dyZ7+TFs0tWx5MFX66zHhgSApIKfndS5NO4AwHRLWkgHe5XgoNZvQ/NE5xDf9xkgrdtS4Ff20tPlNVqMptiTKDBCG+d8q7oX/xeEBjG7ZKAWfvUm1chT4a+kmKnRB7t3+rS83/nsD96p07eoywHl5qoq5DveRVdc+ghnOkGMeAnfc4ARAwNn/ARKfdssl+bTX0f6mBlsOYlXgPK/GqLxPbUSQLKhxfVfMR9HI98tNcS8/XwLVF+1RLNN5g==","From":"Yury Norov <ynorov@nvidia.com>","To":"Linus Walleij <linusw@kernel.org>,\n\tAndy Shevchenko <andriy.shevchenko@linux.intel.com>,\n\tBartosz Golaszewski <brgl@kernel.org>,\n\tShubhrajyoti Datta <shubhrajyoti.datta@amd.com>,\n\tSrinivas Neeli <srinivas.neeli@amd.com>,\n\tMichal Simek <michal.simek@amd.com>,\n\tlinux-gpio@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Cc":"Yury Norov <ynorov@nvidia.com>","Subject":"[PATCH] gpio: drop bitmap_complement() where feasible","Date":"Thu, 16 Apr 2026 23:34:38 -0400","Message-ID":"<20260417033439.318930-1-ynorov@nvidia.com>","X-Mailer":"git-send-email 2.51.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"BN0PR03CA0043.namprd03.prod.outlook.com\n (2603:10b6:408:e7::18) To CY8PR12MB8300.namprd12.prod.outlook.com\n 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c8bec062-12de-4552-2677-08de9c324381","X-MS-Exchange-CrossTenant-AuthSource":"CY8PR12MB8300.namprd12.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"17 Apr 2026 03:34:42.9183\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n CDapGFg721j0sZX9IXd8ZQ/tNV/WfcBL9+5uREcx1z6SFGhy2WkXZygUElKzF41JGu0dxtgWA66ZZzyvXS9nWg==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SJ0PR12MB6926"},"content":"The gpio drivers reproduce the following pattern:\n\n\tbitmap_complement(tmp, data1, nbits);\n\tbitmap_and(dst, data2, tmp, nbits);\n\nThis can be done in a single pass:\n\n\tbitmap_andnot(dst, data2, data1t, nbits);\n\nSigned-off-by: Yury Norov <ynorov@nvidia.com>\n---\n drivers/gpio/gpio-pca953x.c | 7 ++-----\n drivers/gpio/gpio-xilinx.c  | 6 ++----\n 2 files changed, 4 insertions(+), 9 deletions(-)","diff":"diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c\nindex 52e96cc5f67b..1fef733fe1f0 100644\n--- a/drivers/gpio/gpio-pca953x.c\n+++ b/drivers/gpio/gpio-pca953x.c\n@@ -877,11 +877,9 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)\n \tbitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);\n \tbitmap_or(irq_mask, irq_mask, chip->irq_trig_level_high, gc->ngpio);\n \tbitmap_or(irq_mask, irq_mask, chip->irq_trig_level_low, gc->ngpio);\n-\tbitmap_complement(reg_direction, reg_direction, gc->ngpio);\n-\tbitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);\n \n \t/* Look for any newly setup interrupt */\n-\tfor_each_set_bit(level, irq_mask, gc->ngpio)\n+\tfor_each_andnot_bit(level, irq_mask, reg_direction, gc->ngpio)\n \t\tpca953x_gpio_direction_input(&chip->gpio_chip, level);\n \n \tmutex_unlock(&chip->irq_lock);\n@@ -1005,8 +1003,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pendin\n \tbitmap_and(cur_stat, cur_stat, chip->irq_mask, gc->ngpio);\n \tbitmap_or(pending, pending, cur_stat, gc->ngpio);\n \n-\tbitmap_complement(cur_stat, new_stat, gc->ngpio);\n-\tbitmap_and(cur_stat, cur_stat, reg_direction, gc->ngpio);\n+\tbitmap_andnot(cur_stat, reg_direction, new_stat, gc->ngpio);\n \tbitmap_and(old_stat, cur_stat, chip->irq_trig_level_low, gc->ngpio);\n \tbitmap_and(old_stat, old_stat, chip->irq_mask, gc->ngpio);\n \tbitmap_or(pending, pending, old_stat, gc->ngpio);\ndiff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c\nindex be4b4d730547..532205175827 100644\n--- a/drivers/gpio/gpio-xilinx.c\n+++ b/drivers/gpio/gpio-xilinx.c\n@@ -495,13 +495,11 @@ static void xgpio_irqhandler(struct irq_desc *desc)\n \n \txgpio_read_ch_all(chip, XGPIO_DATA_OFFSET, hw);\n \n-\tbitmap_complement(rising, chip->last_irq_read, 64);\n-\tbitmap_and(rising, rising, hw, 64);\n+\tbitmap_andnot(rising, hw, chip->last_irq_read, 64);\n \tbitmap_and(rising, rising, chip->enable, 64);\n \tbitmap_and(rising, rising, chip->rising_edge, 64);\n \n-\tbitmap_complement(falling, hw, 64);\n-\tbitmap_and(falling, falling, chip->last_irq_read, 64);\n+\tbitmap_andnot(falling, chip->last_irq_read, hw, 64);\n \tbitmap_and(falling, falling, chip->enable, 64);\n \tbitmap_and(falling, falling, chip->falling_edge, 64);\n \n","prefixes":[]}