{"id":2224162,"url":"http://patchwork.ozlabs.org/api/patches/2224162/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260417022104.3973576-2-ycliang@andestech.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260417022104.3973576-2-ycliang@andestech.com>","list_archive_url":null,"date":"2026-04-17T02:20:57","name":"[1/8] spi: atcspi200: Clean up register access, macros, naming, DT parsing, and style","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"33e29362f351ea9378260ea3c7b49585eb90caf4","submitter":{"id":79234,"url":"http://patchwork.ozlabs.org/api/people/79234/?format=json","name":"Leo Yu-Chi Liang","email":"ycliang@andestech.com"},"delegate":{"id":17739,"url":"http://patchwork.ozlabs.org/api/users/17739/?format=json","username":"jagan","first_name":"Jagannadha Sutradharudu","last_name":"Teki","email":"jagannadh.teki@gmail.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260417022104.3973576-2-ycliang@andestech.com/mbox/","series":[{"id":500221,"url":"http://patchwork.ozlabs.org/api/series/500221/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=500221","date":"2026-04-17T02:20:56","name":"spi: atcspi200: Modernize driver and add spi-mem + data merge support","version":1,"mbox":"http://patchwork.ozlabs.org/series/500221/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224162/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224162/checks/","tags":{},"related":[],"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=fail (p=reject dis=none) header.from=andestech.com","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de; dmarc=fail (p=reject dis=none)\n header.from=andestech.com","phobos.denx.de;\n spf=pass smtp.mailfrom=ycliang@andestech.com"],"Received":["from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxdtK5cQmz1yGt\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Apr 2026 12:21:45 +1000 (AEST)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id E467984214;\n\tFri, 17 Apr 2026 04:21:31 +0200 (CEST)","by phobos.denx.de (Postfix, from userid 109)\n id 1C35883EEF; Fri, 17 Apr 2026 04:21:30 +0200 (CEST)","from Atcsqr.andestech.com (exmail.andestech.com [60.248.187.195])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 7FF1E83FC0\n for <u-boot@lists.denx.de>; Fri, 17 Apr 2026 04:21:26 +0200 (CEST)","from mail.andestech.com (ATCPCS34.andestech.com [10.0.1.134])\n by Atcsqr.andestech.com with ESMTP id 63H2LAtN015784;\n Fri, 17 Apr 2026 10:21:10 +0800 (+08)\n (envelope-from ycliang@andestech.com)","from swlinux02.andestech.com (10.0.15.183) by ATCPCS34.andestech.com\n (10.0.1.134) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 17 Apr\n 2026 10:21:10 +0800"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,\n RCVD_IN_VALIDITY_RPBL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2","From":"Leo Yu-Chi Liang <ycliang@andestech.com>","To":"<u-boot@lists.denx.de>","CC":"Tom Rini <trini@konsulko.com>, Vignesh R <vigneshr@ti.com>, \"Takahiro\n Kuwano\" <takahiro.kuwano@infineon.com>, Jagan Teki\n <jagan@amarulasolutions.com>, <ycliang@andestech.com>","Subject":"[PATCH 1/8] spi: atcspi200: Clean up register access, macros, naming,\n DT parsing, and style","Date":"Fri, 17 Apr 2026 10:20:57 +0800","Message-ID":"<20260417022104.3973576-2-ycliang@andestech.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260417022104.3973576-1-ycliang@andestech.com>","References":"<20260417022104.3973576-1-ycliang@andestech.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-Originating-IP":"[10.0.15.183]","X-ClientProxiedBy":"ATCPCS33.andestech.com (10.0.1.100) To\n ATCPCS34.andestech.com (10.0.1.134)","X-DKIM-Results":"atcpcs34.andestech.com; dkim=none;","X-DNSRBL":"","X-MAIL":"Atcsqr.andestech.com 63H2LAtN015784","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<https://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"Modernize the ATCSPI200 SPI controller driver:\n\n- Replace volatile struct pointer register access with readl()/writel()\n  using register offset defines and inline wrappers\n- Convert bit field macros from raw shifts to BIT()/GENMASK()/FIELD_PREP()\n- Remove unused macros (SPI0_BUS, SPI1_BUS, SPI0_BASE, SPI1_BASE,\n  NSPI_MAX_CS_NUM) and unused includes (malloc.h, asm/global_data.h)\n- Remove empty __atcspi200_spi_release_bus() function\n- Modernize DT parsing: replace fdtdec_get_int() with\n  dev_read_u32_default(), map_physmem() with dev_remap_addr()\n- Rename struct nds_spi_slave to atcspi200_priv, ns to priv\n- Remove __ prefix from static helpers, rename for consistency\n- Fix typo: atcspi200_ofdata_to_platadata -> atcspi200_spi_of_to_plat\n- Fix coding style: spacing, braces, indentation throughout\n\nNo functional change.\n\nSigned-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>\n---\n drivers/spi/atcspi200_spi.c | 471 ++++++++++++++++++------------------\n 1 file changed, 234 insertions(+), 237 deletions(-)","diff":"diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c\nindex 72b612c6560..8cae96ee23c 100644\n--- a/drivers/spi/atcspi200_spi.c\n+++ b/drivers/spi/atcspi200_spi.c\n@@ -7,75 +7,63 @@\n  */\n \n #include <clk.h>\n+#include <dm.h>\n+#include <dm/device_compat.h>\n #include <log.h>\n-#include <malloc.h>\n #include <spi.h>\n-#include <asm/global_data.h>\n #include <asm/io.h>\n-#include <dm.h>\n-\n-DECLARE_GLOBAL_DATA_PTR;\n+#include <linux/bitfield.h>\n+#include <linux/bitops.h>\n \n #define MAX_TRANSFER_LEN\t512\n #define CHUNK_SIZE\t\t1\n #define SPI_TIMEOUT\t\t0x100000\n-#define SPI0_BUS\t\t0\n-#define SPI1_BUS\t\t1\n-#define SPI0_BASE\t\t0xf0b00000\n-#define SPI1_BASE\t\t0xf0f00000\n-#define NSPI_MAX_CS_NUM\t\t1\n-\n-struct atcspi200_spi_regs {\n-\tu32\trev;\n-\tu32\treserve1[3];\n-\tu32\tformat;\t\t/* 0x10 */\n-#define DATA_LENGTH(x)\t((x-1)<<8)\n-\tu32\tpio;\n-\tu32\treserve2[2];\n-\tu32\ttctrl;\t\t/* 0x20 */\n-#define TRAMODE_OFFSET\t24\n-#define TRAMODE_MASK\t(0x0F<<TRAMODE_OFFSET)\n-#define TRAMODE_WR_SYNC\t(0<<TRAMODE_OFFSET)\n-#define TRAMODE_WO\t(1<<TRAMODE_OFFSET)\n-#define TRAMODE_RO\t(2<<TRAMODE_OFFSET)\n-#define TRAMODE_WR\t(3<<TRAMODE_OFFSET)\n-#define TRAMODE_RW\t(4<<TRAMODE_OFFSET)\n-#define TRAMODE_WDR\t(5<<TRAMODE_OFFSET)\n-#define TRAMODE_RDW\t(6<<TRAMODE_OFFSET)\n-#define TRAMODE_NONE\t(7<<TRAMODE_OFFSET)\n-#define TRAMODE_DW\t(8<<TRAMODE_OFFSET)\n-#define TRAMODE_DR\t(9<<TRAMODE_OFFSET)\n-#define WCNT_OFFSET\t12\n-#define WCNT_MASK\t(0x1FF<<WCNT_OFFSET)\n-#define RCNT_OFFSET\t0\n-#define RCNT_MASK\t(0x1FF<<RCNT_OFFSET)\n-\tu32\tcmd;\n-\tu32\taddr;\n-\tu32\tdata;\n-\tu32\tctrl;\t\t/* 0x30 */\n-#define TXFTH_OFFSET\t16\n-#define RXFTH_OFFSET\t8\n-#define TXDMAEN\t\t(1<<4)\n-#define RXDMAEN\t\t(1<<3)\n-#define TXFRST\t\t(1<<2)\n-#define RXFRST\t\t(1<<1)\n-#define SPIRST\t\t(1<<0)\n-\tu32\tstatus;\n-#define TXFFL\t\t(1<<23)\n-#define TXEPTY\t\t(1<<22)\n-#define TXFVE_MASK\t(0x1F<<16)\n-#define RXFEM\t\t(1<<14)\n-#define RXFVE_OFFSET\t(8)\n-#define RXFVE_MASK\t(0x1F<<RXFVE_OFFSET)\n-#define SPIBSY\t\t(1<<0)\n-\tu32\tinten;\n-\tu32\tintsta;\n-\tu32\ttiming;\t\t/* 0x40 */\n-#define SCLK_DIV_MASK\t0xFF\n-};\n \n-struct nds_spi_slave {\n-\tvolatile struct atcspi200_spi_regs *regs;\n+/* Register offsets */\n+#define ATCSPI200_REG_FORMAT\t0x10\n+#define ATCSPI200_REG_TCTRL\t0x20\n+#define ATCSPI200_REG_CMD\t0x24\n+#define ATCSPI200_REG_ADDR\t0x28\n+#define ATCSPI200_REG_DATA\t0x2c\n+#define ATCSPI200_REG_CTRL\t0x30\n+#define ATCSPI200_REG_STATUS\t0x34\n+#define ATCSPI200_REG_TIMING\t0x40\n+\n+/* FORMAT register fields */\n+#define DATA_LEN_MASK\t\tGENMASK(12, 8)\n+\n+/* TCTRL register fields */\n+#define TRAMODE_MASK\t\tGENMASK(27, 24)\n+#define TRAMODE_WR_SYNC\t\tFIELD_PREP(TRAMODE_MASK, 0)\n+#define TRAMODE_WO\t\tFIELD_PREP(TRAMODE_MASK, 1)\n+#define TRAMODE_RO\t\tFIELD_PREP(TRAMODE_MASK, 2)\n+#define TRAMODE_WR\t\tFIELD_PREP(TRAMODE_MASK, 3)\n+#define TRAMODE_RW\t\tFIELD_PREP(TRAMODE_MASK, 4)\n+#define TRAMODE_WDR\t\tFIELD_PREP(TRAMODE_MASK, 5)\n+#define TRAMODE_RDW\t\tFIELD_PREP(TRAMODE_MASK, 6)\n+#define TRAMODE_NONE\t\tFIELD_PREP(TRAMODE_MASK, 7)\n+#define TRAMODE_DW\t\tFIELD_PREP(TRAMODE_MASK, 8)\n+#define TRAMODE_DR\t\tFIELD_PREP(TRAMODE_MASK, 9)\n+#define WCNT_MASK\t\tGENMASK(20, 12)\n+#define RCNT_MASK\t\tGENMASK(8, 0)\n+\n+/* CTRL register fields */\n+#define TXFRST\t\t\tBIT(2)\n+#define RXFRST\t\t\tBIT(1)\n+#define SPIRST\t\t\tBIT(0)\n+\n+/* STATUS register fields */\n+#define TXFFL\t\t\tBIT(23)\n+#define TXEPTY\t\t\tBIT(22)\n+#define TXFVE_MASK\t\tGENMASK(20, 16)\n+#define RXFVE_MASK\t\tGENMASK(12, 8)\n+#define SPIBSY\t\t\tBIT(0)\n+\n+/* TIMING register fields */\n+#define SCLK_DIV_MASK\t\tGENMASK(7, 0)\n+\n+struct atcspi200_priv {\n+\tvoid\t\t*regs;\n \tint\t\tto;\n \tunsigned int\tfreq;\n \tulong\t\tclock;\n@@ -88,265 +76,278 @@ struct nds_spi_slave {\n \tsize_t\t\ttran_len;\n \tu8\t\t*din;\n \tu8\t\t*dout;\n-\tunsigned int    max_transfer_length;\n+\tunsigned int\tmax_transfer_length;\n };\n \n-static int __atcspi200_spi_set_speed(struct nds_spi_slave *ns)\n+static inline u32 atcspi200_read(struct atcspi200_priv *priv, u32 offset)\n+{\n+\treturn readl(priv->regs + offset);\n+}\n+\n+static inline void atcspi200_write(struct atcspi200_priv *priv, u32 offset,\n+\t\t\t\t   u32 val)\n+{\n+\twritel(val, priv->regs + offset);\n+}\n+\n+static int atcspi200_hw_set_speed(struct atcspi200_priv *priv)\n {\n \tu32 tm;\n \tu8 div;\n-\ttm = ns->regs->timing;\n+\n+\ttm = atcspi200_read(priv, ATCSPI200_REG_TIMING);\n \ttm &= ~SCLK_DIV_MASK;\n \n-\tif(ns->freq >= ns->clock)\n-\t\tdiv =0xff;\n-\telse{\n+\tif (priv->freq >= priv->clock) {\n+\t\tdiv = 0xff;\n+\t} else {\n \t\tfor (div = 0; div < 0xff; div++) {\n-\t\t\tif (ns->freq >= ns->clock / (2 * (div + 1)))\n+\t\t\tif (priv->freq >= priv->clock / (2 * (div + 1)))\n \t\t\t\tbreak;\n \t\t}\n \t}\n \n \ttm |= div;\n-\tns->regs->timing = tm;\n+\tatcspi200_write(priv, ATCSPI200_REG_TIMING, tm);\n \n \treturn 0;\n-\n }\n \n-static int __atcspi200_spi_claim_bus(struct nds_spi_slave *ns)\n+static int atcspi200_hw_claim_bus(struct atcspi200_priv *priv)\n {\n-\t\tunsigned int format=0;\n-\t\tns->regs->ctrl |= (TXFRST|RXFRST|SPIRST);\n-\t\twhile((ns->regs->ctrl &(TXFRST|RXFRST|SPIRST))&&(ns->to--))\n-\t\t\tif(!ns->to)\n-\t\t\t\treturn -EINVAL;\n-\n-\t\tns->cmd_len = 0;\n-\t\tformat = ns->mode|DATA_LENGTH(8);\n-\t\tns->regs->format = format;\n-\t\t__atcspi200_spi_set_speed(ns);\n+\tunsigned int format;\n+\n+\tatcspi200_write(priv, ATCSPI200_REG_CTRL,\n+\t\t\tatcspi200_read(priv, ATCSPI200_REG_CTRL) |\n+\t\t\tTXFRST | RXFRST | SPIRST);\n+\twhile ((atcspi200_read(priv, ATCSPI200_REG_CTRL) &\n+\t\t(TXFRST | RXFRST | SPIRST)) && priv->to--)\n+\t\tif (!priv->to)\n+\t\t\treturn -EINVAL;\n \n-\t\treturn 0;\n-}\n+\tpriv->cmd_len = 0;\n+\tformat = priv->mode | FIELD_PREP(DATA_LEN_MASK, 8 - 1);\n+\tatcspi200_write(priv, ATCSPI200_REG_FORMAT, format);\n+\tatcspi200_hw_set_speed(priv);\n \n-static int __atcspi200_spi_release_bus(struct nds_spi_slave *ns)\n-{\n-\t/* do nothing */\n \treturn 0;\n }\n \n-static int __atcspi200_spi_start(struct nds_spi_slave *ns)\n+static int atcspi200_hw_start(struct atcspi200_priv *priv)\n {\n-\tint i,olen=0;\n-\tint tc = ns->regs->tctrl;\n+\tint i, olen = 0;\n+\tu32 tc;\n \n-\ttc &= ~(WCNT_MASK|RCNT_MASK|TRAMODE_MASK);\n-\tif ((ns->din)&&(ns->cmd_len))\n+\ttc = atcspi200_read(priv, ATCSPI200_REG_TCTRL);\n+\ttc &= ~(WCNT_MASK | RCNT_MASK | TRAMODE_MASK);\n+\n+\tif (priv->din && priv->cmd_len)\n \t\ttc |= TRAMODE_WR;\n-\telse if (ns->din)\n+\telse if (priv->din)\n \t\ttc |= TRAMODE_RO;\n \telse\n \t\ttc |= TRAMODE_WO;\n \n-\tif(ns->dout)\n-\t\tolen = ns->tran_len;\n-\ttc |= (ns->cmd_len+olen-1) << WCNT_OFFSET;\n+\tif (priv->dout)\n+\t\tolen = priv->tran_len;\n+\ttc |= FIELD_PREP(WCNT_MASK, priv->cmd_len + olen - 1);\n \n-\tif(ns->din)\n-\t\ttc |= (ns->tran_len-1) << RCNT_OFFSET;\n+\tif (priv->din)\n+\t\ttc |= FIELD_PREP(RCNT_MASK, priv->tran_len - 1);\n \n-\tns->regs->tctrl = tc;\n-\tns->regs->cmd = 1;\n+\tatcspi200_write(priv, ATCSPI200_REG_TCTRL, tc);\n+\tatcspi200_write(priv, ATCSPI200_REG_CMD, 1);\n \n-\tfor (i=0;i<ns->cmd_len;i++)\n-\t\tns->regs->data = ns->cmd_buf[i];\n+\tfor (i = 0; i < priv->cmd_len; i++)\n+\t\tatcspi200_write(priv, ATCSPI200_REG_DATA, priv->cmd_buf[i]);\n \n \treturn 0;\n }\n \n-static int __atcspi200_spi_stop(struct nds_spi_slave *ns)\n+static int atcspi200_hw_stop(struct atcspi200_priv *priv)\n {\n-\tns->regs->timing = ns->mtiming;\n-\twhile ((ns->regs->status & SPIBSY)&&(ns->to--))\n-\t\tif (!ns->to)\n+\tatcspi200_write(priv, ATCSPI200_REG_TIMING, priv->mtiming);\n+\twhile ((atcspi200_read(priv, ATCSPI200_REG_STATUS) & SPIBSY) &&\n+\t       priv->to--)\n+\t\tif (!priv->to)\n \t\t\treturn -EINVAL;\n \n \treturn 0;\n }\n \n-static void __nspi_espi_tx(struct nds_spi_slave *ns, const void *dout)\n+static void atcspi200_tx_byte(struct atcspi200_priv *priv, const void *dout)\n {\n-\tns->regs->data = *(u8 *)dout;\n+\tatcspi200_write(priv, ATCSPI200_REG_DATA, *(u8 *)dout);\n }\n \n-static int __nspi_espi_rx(struct nds_spi_slave *ns, void *din, unsigned int bytes)\n+static int atcspi200_rx_byte(struct atcspi200_priv *priv, void *din,\n+\t\t\t     unsigned int bytes)\n {\n-\t*(u8 *)din = ns->regs->data;\n+\t*(u8 *)din = (u8)atcspi200_read(priv, ATCSPI200_REG_DATA);\n \treturn bytes;\n }\n \n-static int __atcspi200_spi_xfer(struct nds_spi_slave *ns,\n-\t\tunsigned int bitlen,  const void *data_out, void *data_in,\n-\t\tunsigned long flags)\n+static int atcspi200_hw_xfer(struct atcspi200_priv *priv,\n+\t\t\t     unsigned int bitlen, const void *data_out,\n+\t\t\t     void *data_in, unsigned long flags)\n {\n-\t\tunsigned int event, rx_bytes;\n-\t\tconst void *dout = NULL;\n-\t\tvoid *din = NULL;\n-\t\tint num_blks, num_chunks, max_tran_len, tran_len;\n-\t\tint num_bytes;\n-\t\tu8 *cmd_buf = ns->cmd_buf;\n-\t\tsize_t cmd_len = ns->cmd_len;\n-\t\tunsigned long data_len = bitlen / 8;\n-\t\tint rf_cnt;\n-\t\tint ret = 0, timeout = 0;\n-\n-\t\tmax_tran_len = ns->max_transfer_length;\n-\t\tswitch (flags) {\n-\t\tcase SPI_XFER_BEGIN:\n-\t\t\tcmd_len = ns->cmd_len = data_len;\n-\t\t\tmemcpy(cmd_buf, data_out, cmd_len);\n+\tunsigned int event, rx_bytes;\n+\tconst void *dout = NULL;\n+\tvoid *din = NULL;\n+\tint num_blks, num_chunks, max_tran_len, tran_len;\n+\tint num_bytes;\n+\tu8 *cmd_buf = priv->cmd_buf;\n+\tsize_t cmd_len = priv->cmd_len;\n+\tunsigned long data_len = bitlen / 8;\n+\tint rf_cnt;\n+\tint ret = 0, timeout = 0;\n+\n+\tmax_tran_len = priv->max_transfer_length;\n+\tswitch (flags) {\n+\tcase SPI_XFER_BEGIN:\n+\t\tcmd_len = priv->cmd_len = data_len;\n+\t\tmemcpy(cmd_buf, data_out, cmd_len);\n+\t\treturn 0;\n+\n+\tcase 0:\n+\tcase SPI_XFER_END:\n+\t\tif (bitlen == 0)\n \t\t\treturn 0;\n+\t\tpriv->data_len = data_len;\n+\t\tpriv->din = (u8 *)data_in;\n+\t\tpriv->dout = (u8 *)data_out;\n+\t\tbreak;\n+\n+\tcase SPI_XFER_BEGIN | SPI_XFER_END:\n+\t\tpriv->data_len = 0;\n+\t\tpriv->din = 0;\n+\t\tpriv->dout = 0;\n+\t\tcmd_len = priv->cmd_len = data_len;\n+\t\tmemcpy(cmd_buf, data_out, cmd_len);\n+\t\tdata_out = 0;\n+\t\tdata_len = 0;\n+\t\tatcspi200_hw_start(priv);\n+\t\tbreak;\n+\t}\n \n-\t\tcase 0:\n-\t\tcase SPI_XFER_END:\n-\t\t\tif (bitlen == 0) {\n-\t\t\t\treturn 0;\n+\tif (data_out)\n+\t\tdebug(\"spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %lu\\n\",\n+\t\t      *(uint *)data_out, data_out, *(uint *)data_in,\n+\t\t      data_in, data_len);\n+\n+\tnum_chunks = DIV_ROUND_UP(data_len, max_tran_len);\n+\tdin = data_in;\n+\tdout = data_out;\n+\twhile (num_chunks--) {\n+\t\ttran_len = min((size_t)data_len, (size_t)max_tran_len);\n+\t\tpriv->tran_len = tran_len;\n+\t\tnum_blks = DIV_ROUND_UP(tran_len, CHUNK_SIZE);\n+\t\tnum_bytes = tran_len % CHUNK_SIZE;\n+\t\ttimeout = SPI_TIMEOUT;\n+\t\tif (num_bytes == 0)\n+\t\t\tnum_bytes = CHUNK_SIZE;\n+\t\tatcspi200_hw_start(priv);\n+\n+\t\twhile (num_blks && timeout--) {\n+\t\t\tevent = atcspi200_read(priv, ATCSPI200_REG_STATUS);\n+\n+\t\t\tif ((event & TXEPTY) && data_out) {\n+\t\t\t\tatcspi200_tx_byte(priv, dout);\n+\t\t\t\tnum_blks -= CHUNK_SIZE;\n+\t\t\t\tdout += CHUNK_SIZE;\n \t\t\t}\n-\t\t\tns->data_len = data_len;\n-\t\t\tns->din = (u8 *)data_in;\n-\t\t\tns->dout = (u8 *)data_out;\n-\t\t\tbreak;\n-\n-\t\tcase SPI_XFER_BEGIN | SPI_XFER_END:\n-\t\t\tns->data_len = 0;\n-\t\t\tns->din = 0;\n-\t\t\tns->dout = 0;\n-\t\t\tcmd_len = ns->cmd_len = data_len;\n-\t\t\tmemcpy(cmd_buf, data_out, cmd_len);\n-\t\t\tdata_out = 0;\n-\t\t\tdata_len = 0;\n-\t\t\t__atcspi200_spi_start(ns);\n-\t\t\tbreak;\n-\t\t}\n-\t\tif (data_out)\n-\t\t\tdebug(\"spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %lu\\n\",\n-\t\t\t      *(uint *)data_out, data_out, *(uint *)data_in,\n-\t\t\t      data_in, data_len);\n-\t\tnum_chunks = DIV_ROUND_UP(data_len, max_tran_len);\n-\t\tdin = data_in;\n-\t\tdout = data_out;\n-\t\twhile (num_chunks--) {\n-\t\t\ttran_len = min((size_t)data_len, (size_t)max_tran_len);\n-\t\t\tns->tran_len = tran_len;\n-\t\t\tnum_blks = DIV_ROUND_UP(tran_len , CHUNK_SIZE);\n-\t\t\tnum_bytes = (tran_len) % CHUNK_SIZE;\n-\t\t\ttimeout = SPI_TIMEOUT;\n-\t\t\tif(num_bytes == 0)\n-\t\t\t\tnum_bytes = CHUNK_SIZE;\n-\t\t\t__atcspi200_spi_start(ns);\n-\n-\t\t\twhile (num_blks && (timeout--)) {\n-\t\t\t\tevent = in_le32(&ns->regs->status);\n-\t\t\t\tif ((event & TXEPTY) && (data_out)) {\n-\t\t\t\t\t__nspi_espi_tx(ns, dout);\n-\t\t\t\t\tnum_blks -= CHUNK_SIZE;\n-\t\t\t\t\tdout += CHUNK_SIZE;\n-\t\t\t\t}\n-\n-\t\t\t\tif ((event & RXFVE_MASK) && (data_in)) {\n-\t\t\t\t\trf_cnt = ((event & RXFVE_MASK)>> RXFVE_OFFSET);\n-\t\t\t\t\tif (rf_cnt >= CHUNK_SIZE)\n-\t\t\t\t\t\trx_bytes = CHUNK_SIZE;\n-\t\t\t\t\telse if (num_blks == 1 && rf_cnt == num_bytes)\n-\t\t\t\t\t\trx_bytes = num_bytes;\n-\t\t\t\t\telse\n-\t\t\t\t\t\tcontinue;\n-\n-\t\t\t\t\tif (__nspi_espi_rx(ns, din, rx_bytes) == rx_bytes) {\n-\t\t\t\t\t\tnum_blks -= CHUNK_SIZE;\n-\t\t\t\t\t\tdin = (unsigned char *)din + rx_bytes;\n-\t\t\t\t\t}\n-\t\t\t\t}\n \n-\t\t\t\tif (!timeout) {\n-\t\t\t\t\tdebug(\"spi_xfer: %s() timeout\\n\", __func__);\n-\t\t\t\t\tbreak;\n+\t\t\tif ((event & RXFVE_MASK) && data_in) {\n+\t\t\t\trf_cnt = FIELD_GET(RXFVE_MASK, event);\n+\t\t\t\tif (rf_cnt >= CHUNK_SIZE)\n+\t\t\t\t\trx_bytes = CHUNK_SIZE;\n+\t\t\t\telse if (num_blks == 1 &&\n+\t\t\t\t\t rf_cnt == num_bytes)\n+\t\t\t\t\trx_bytes = num_bytes;\n+\t\t\t\telse\n+\t\t\t\t\tcontinue;\n+\n+\t\t\t\tif (atcspi200_rx_byte(priv, din, rx_bytes) ==\n+\t\t\t\t    rx_bytes) {\n+\t\t\t\t\tnum_blks -= CHUNK_SIZE;\n+\t\t\t\t\tdin = (unsigned char *)din + rx_bytes;\n \t\t\t\t}\n \t\t\t}\n \n-\t\t\tdata_len -= tran_len;\n-\t\t\tif(data_len)\n-\t\t\t{\n-\t\t\t\tns->cmd_buf[1] += ((tran_len>>16)&0xff);\n-\t\t\t\tns->cmd_buf[2] += ((tran_len>>8)&0xff);\n-\t\t\t\tns->cmd_buf[3] += ((tran_len)&0xff);\n-\t\t\t\tns->data_len = data_len;\n+\t\t\tif (!timeout) {\n+\t\t\t\tdebug(\"spi_xfer: %s() timeout\\n\", __func__);\n+\t\t\t\tbreak;\n \t\t\t}\n-\t\t\tret = __atcspi200_spi_stop(ns);\n \t\t}\n-\t\tret = __atcspi200_spi_stop(ns);\n \n-\t\treturn ret;\n+\t\tdata_len -= tran_len;\n+\t\tif (data_len) {\n+\t\t\tpriv->cmd_buf[1] += ((tran_len >> 16) & 0xff);\n+\t\t\tpriv->cmd_buf[2] += ((tran_len >> 8) & 0xff);\n+\t\t\tpriv->cmd_buf[3] += (tran_len & 0xff);\n+\t\t\tpriv->data_len = data_len;\n+\t\t}\n+\t\tret = atcspi200_hw_stop(priv);\n+\t}\n+\tret = atcspi200_hw_stop(priv);\n+\n+\treturn ret;\n }\n \n static int atcspi200_spi_set_speed(struct udevice *bus, uint max_hz)\n {\n-\tstruct nds_spi_slave *ns = dev_get_priv(bus);\n+\tstruct atcspi200_priv *priv = dev_get_priv(bus);\n \n \tdebug(\"%s speed %u\\n\", __func__, max_hz);\n \n-\tns->freq = max_hz;\n-\t__atcspi200_spi_set_speed(ns);\n+\tpriv->freq = max_hz;\n+\tatcspi200_hw_set_speed(priv);\n \n \treturn 0;\n }\n \n static int atcspi200_spi_set_mode(struct udevice *bus, uint mode)\n {\n-\tstruct nds_spi_slave *ns = dev_get_priv(bus);\n+\tstruct atcspi200_priv *priv = dev_get_priv(bus);\n \n \tdebug(\"%s mode %u\\n\", __func__, mode);\n-\tns->mode = mode;\n+\tpriv->mode = mode;\n \n \treturn 0;\n }\n \n static int atcspi200_spi_claim_bus(struct udevice *dev)\n {\n-\tstruct dm_spi_slave_plat *slave_plat =\n-\t\tdev_get_parent_plat(dev);\n+\tstruct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);\n \tstruct udevice *bus = dev->parent;\n-\tstruct nds_spi_slave *ns = dev_get_priv(bus);\n+\tstruct atcspi200_priv *priv = dev_get_priv(bus);\n \n-\tif (slave_plat->cs[0] >= ns->num_cs) {\n-\t\tprintf(\"Invalid SPI chipselect\\n\");\n+\tif (slave_plat->cs[0] >= priv->num_cs) {\n+\t\tdev_err(dev, \"Invalid SPI chipselect\\n\");\n \t\treturn -EINVAL;\n \t}\n \n-\treturn __atcspi200_spi_claim_bus(ns);\n+\treturn atcspi200_hw_claim_bus(priv);\n }\n \n static int atcspi200_spi_release_bus(struct udevice *dev)\n {\n-\tstruct nds_spi_slave *ns = dev_get_priv(dev->parent);\n-\n-\treturn __atcspi200_spi_release_bus(ns);\n+\treturn 0;\n }\n \n static int atcspi200_spi_xfer(struct udevice *dev, unsigned int bitlen,\n-\t\t\t    const void *dout, void *din,\n-\t\t\t    unsigned long flags)\n+\t\t\t      const void *dout, void *din,\n+\t\t\t      unsigned long flags)\n {\n \tstruct udevice *bus = dev->parent;\n-\tstruct nds_spi_slave *ns = dev_get_priv(bus);\n+\tstruct atcspi200_priv *priv = dev_get_priv(bus);\n \n-\treturn __atcspi200_spi_xfer(ns, bitlen, dout, din, flags);\n+\treturn atcspi200_hw_xfer(priv, bitlen, dout, din, flags);\n }\n \n static int atcspi200_spi_get_clk(struct udevice *bus)\n {\n-\tstruct nds_spi_slave *ns = dev_get_priv(bus);\n+\tstruct atcspi200_priv *priv = dev_get_priv(bus);\n \tstruct clk clk;\n \tulong clk_rate;\n \tint ret;\n@@ -359,37 +360,33 @@ static int atcspi200_spi_get_clk(struct udevice *bus)\n \tif (!clk_rate)\n \t\treturn -EINVAL;\n \n-\tns->clock = clk_rate;\n+\tpriv->clock = clk_rate;\n \n \treturn 0;\n }\n \n static int atcspi200_spi_probe(struct udevice *bus)\n {\n-\tstruct nds_spi_slave *ns = dev_get_priv(bus);\n+\tstruct atcspi200_priv *priv = dev_get_priv(bus);\n \n-\tns->to = SPI_TIMEOUT;\n-\tns->max_transfer_length = MAX_TRANSFER_LEN;\n-\tns->mtiming = ns->regs->timing;\n+\tpriv->to = SPI_TIMEOUT;\n+\tpriv->max_transfer_length = MAX_TRANSFER_LEN;\n+\tpriv->mtiming = atcspi200_read(priv, ATCSPI200_REG_TIMING);\n \tatcspi200_spi_get_clk(bus);\n \n \treturn 0;\n }\n \n-static int atcspi200_ofdata_to_platadata(struct udevice *bus)\n+static int atcspi200_spi_of_to_plat(struct udevice *bus)\n {\n-\tstruct nds_spi_slave *ns = dev_get_priv(bus);\n-\tconst void *blob = gd->fdt_blob;\n-\tint node = dev_of_offset(bus);\n-\n-\tns->regs = map_physmem(dev_read_addr(bus),\n-\t\t\t\t sizeof(struct atcspi200_spi_regs),\n-\t\t\t\t MAP_NOCACHE);\n-\tif (!ns->regs) {\n-\t\tprintf(\"%s: could not map device address\\n\", __func__);\n+\tstruct atcspi200_priv *priv = dev_get_priv(bus);\n+\n+\tpriv->regs = dev_remap_addr(bus);\n+\tif (!priv->regs) {\n+\t\tdev_err(bus, \"could not map device address\\n\");\n \t\treturn -EINVAL;\n \t}\n-\tns->num_cs = fdtdec_get_int(blob, node, \"num-cs\", 4);\n+\tpriv->num_cs = dev_read_u32_default(bus, \"num-cs\", 4);\n \n \treturn 0;\n }\n@@ -412,7 +409,7 @@ U_BOOT_DRIVER(atcspi200_spi) = {\n \t.id = UCLASS_SPI,\n \t.of_match = atcspi200_spi_ids,\n \t.ops = &atcspi200_spi_ops,\n-\t.of_to_plat = atcspi200_ofdata_to_platadata,\n-\t.priv_auto\t= sizeof(struct nds_spi_slave),\n+\t.of_to_plat = atcspi200_spi_of_to_plat,\n+\t.priv_auto = sizeof(struct atcspi200_priv),\n \t.probe = atcspi200_spi_probe,\n };\n","prefixes":["1/8"]}