{"id":2224150,"url":"http://patchwork.ozlabs.org/api/patches/2224150/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/c90693e75c0610da38103a683b558d5596bd843b.1776381841.git.nicolinc@nvidia.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2026-04-16T23:28:32","name":"[v3,03/11] iommu: Add reset_device_done callback for hardware fault recovery","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b4e92eb8071670af023adfa313b28434712d0b7d","submitter":{"id":82183,"url":"http://patchwork.ozlabs.org/api/people/82183/?format=json","name":"Nicolin Chen","email":"nicolinc@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/c90693e75c0610da38103a683b558d5596bd843b.1776381841.git.nicolinc@nvidia.com/mbox/","series":[{"id":500217,"url":"http://patchwork.ozlabs.org/api/series/500217/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=500217","date":"2026-04-16T23:28:31","name":"iommu/arm-smmu-v3: Quarantine device upon ATC invalidation timeout","version":3,"mbox":"http://patchwork.ozlabs.org/series/500217/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224150/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224150/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=LAlxWFwh;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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Wysocki\" , Len Brown ,\n\tPranjal Shrivastava , Mostafa Saleh ,\n\tLu Baolu , Kevin Tian ,\n\t, ,\n\t, ,\n\t, , Shuai Xue\n\t","Subject":"[PATCH v3 03/11] iommu: Add reset_device_done callback for hardware\n fault recovery","Date":"Thu, 16 Apr 2026 16:28:32 -0700","Message-ID":"\n ","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"","References":"","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-NV-OnPremToCloud":"ExternallySecured","X-EOPAttributedMessage":"0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"CO1PEPF00012E7F:EE_|SA1PR12MB999254:EE_","X-MS-Office365-Filtering-Correlation-Id":"28176e69-ce49-4ae4-eea3-08de9c0ffa0b","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"\n\tBCL:0;ARA:13230040|7416014|376014|1800799024|82310400026|36860700016|22082099003|56012099003|18002099003;","X-Microsoft-Antispam-Message-Info":"\n\tRHXSxaU+/ahkQGbw7rsLod1xXamHmpKclaIwJfaBI/NPetf8rSHjSg0EJppclzeMQVS0oQeIFmOX1sepJG12mMXYlhIbq9lPYl30TGuSpZJfYG5vCfQdAADuu417ciFRbAxZIotEsS9v57Nd0MzaoTm4CF5cmFvC/Xe4bqCoJyJU5jK11J6B3K3dwgx2pEPAqgz+catmOPxz8qzYVhuejRzAn6Zzsf4cJUVr7z4pSIRnK2jAgXFFHq4mrxgi+qboioa8pZYdaU6qyvuE91cssRmysx8JgJC7Ko84RurhNHwg6TQ4sIui0aWlcW8Yk7ZKlIeh4M6EOAxlRepW1IeEZUTCDhphSVwrhrDQy+v8gNOHZtNGzLXTOZjRH87DqqjyRZtzaluJlKVqFsYWDzlcVsSoR4LR3RpfKUPnvKl6nOvK6BTgpf7TVp5oQkHbXZxp4bl3MJQYvrYbsv2I6VwJ/UMzd5b6uVEWm9NBaIyHJ5InJdFjx2OWrzkVDqqrDeHPadyR6EOW89DNvbESwgB943mqd5dAYnwaSx03sB0bTpGTQ4F9kg+ipmLQrYW9lVac5VjTkKweKSXgAV2b/J49syIwNSE45KNu3qIy9KG+oRDwmHoOZHNVptLrSrJ1QOLfzK8ke7nr2mnlVFOXQ4bvMSGHdo6MgK9Zf7QkQoSsfBClRmcJ2JujLrgm3NhVo7YVrrbLqWBsZibsb+pXOSSkz5K7HPUOV9GBSG587EWoPqcD+A+9hQ0snTmUBEUNoQkNAP77EDGEbBfJHOOe/X/eSg==","X-Forefront-Antispam-Report":"\n\tCIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(376014)(1800799024)(82310400026)(36860700016)(22082099003)(56012099003)(18002099003);DIR:OUT;SFP:1101;","X-MS-Exchange-AntiSpam-MessageData-ChunkCount":"1","X-MS-Exchange-AntiSpam-MessageData-0":"\n\t5wVyJpGHSORQ2Eh/pNsSTi6EL1PKrQiUa1khw7wv3S9FgyLjZ+7J6+WHxwZhBY7ADefoIRUxrSGV08FxsDYvcWxpgmYqqsw7aD8/VWKwKtLzDpfCnDDxt+uFqgTLH8lCP5YsIlxI54HXnjkwLVWbc3s6HvlJq28cRdhddvsbv586dbiUPmU7RN8P4vdk/E/WOKQTYuyt1Ww5h2dcN2hfO7ypkxa6Tnzg/fTp5k/CUDzKhSvLzfaaHDVdBAB4oacykgsaRAvo1z+Ao0leYk+xX7qA2e/F1Zixm/1iWNderKfuDUkxVhvlbg16L7nVo37p5cctebxeOjqpQo/vvj/xs5XbGKT6obTjwYFCH45olRbg+lDK5Nayzz85Zh3p1izR3wVyx0wcX0H7K3KkduzgKp4FHs5EBro1A6mxUHq0p0hwRx3P6z+Z7JqZUJcGiFR9","X-OriginatorOrg":"Nvidia.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"16 Apr 2026 23:29:16.5769\n (UTC)","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 28176e69-ce49-4ae4-eea3-08de9c0ffa0b","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n\tCO1PEPF00012E7F.namprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SA1PR12MB999254"},"content":"When an IOMMU hardware detects an error due to a faulty device (e.g. an ATS\ninvalidation timeout), IOMMU drivers may quarantine the device by disabling\nspecific hardware features or dropping translation capabilities.\n\nTo recover from these states, the IOMMU driver needs a reliable signal that\nthe underlying physical hardware has been cleanly reset (e.g., via PCIe AER\nor a sysfs Function Level Reset) so as to lift the quarantine.\n\nIntroduce a reset_device_done callback in struct iommu_ops. Trigger it from\nthe existing pci_dev_reset_iommu_done() path to notify the underlying IOMMU\ndriver that the device's internal state has been sanitized.\n\nSigned-off-by: Nicolin Chen \n---\n include/linux/iommu.h | 4 ++++\n drivers/iommu/iommu.c | 12 ++++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/include/linux/iommu.h b/include/linux/iommu.h\nindex d3685967e960a..3c5c5fa5cdc6a 100644\n--- a/include/linux/iommu.h\n+++ b/include/linux/iommu.h\n@@ -626,6 +626,9 @@ __iommu_copy_struct_to_user(const struct iommu_user_data *dst_data,\n * @release_device: Remove device from iommu driver handling\n * @probe_finalize: Do final setup work after the device is added to an IOMMU\n * group and attached to the groups domain\n+ * @reset_device_done: Notify the driver that a device has reset successfully.\n+ * Note that the core invokes the callback function while\n+ * holding the group->mutex\n * @device_group: find iommu group for a particular device\n * @get_resv_regions: Request list of reserved regions for a device\n * @of_xlate: add OF master IDs to iommu grouping\n@@ -683,6 +686,7 @@ struct iommu_ops {\n \tstruct iommu_device *(*probe_device)(struct device *dev);\n \tvoid (*release_device)(struct device *dev);\n \tvoid (*probe_finalize)(struct device *dev);\n+\tvoid (*reset_device_done)(struct device *dev);\n \tstruct iommu_group *(*device_group)(struct device *dev);\n \n \t/* Request/Free a list of reserved regions for a device */\ndiff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c\nindex 28d4c1f143a08..df23ef0a26e6c 100644\n--- a/drivers/iommu/iommu.c\n+++ b/drivers/iommu/iommu.c\n@@ -4071,12 +4071,14 @@ EXPORT_SYMBOL_GPL(pci_dev_reset_iommu_prepare);\n void pci_dev_reset_iommu_done(struct pci_dev *pdev, bool reset_succeeds)\n {\n \tstruct iommu_group *group = pdev->dev.iommu_group;\n+\tconst struct iommu_ops *ops;\n \tstruct group_device *gdev;\n \tunsigned long pasid;\n \tvoid *entry;\n \n \tif (!pci_ats_supported(pdev) || !dev_has_iommu(&pdev->dev))\n \t\treturn;\n+\tops = dev_iommu_ops(&pdev->dev);\n \n \tguard(mutex)(&group->mutex);\n \n@@ -4105,6 +4107,16 @@ void pci_dev_reset_iommu_done(struct pci_dev *pdev, bool reset_succeeds)\n \t\treturn;\n \t}\n \n+\t/*\n+\t * A PCI device might have been in an error state, so the IOMMU driver\n+\t * had to quarantine the device by disabling specific hardware features\n+\t * or dropping translation capability. Here notify the IOMMU driver as\n+\t * a reliable signal that the faulty PCI device has been cleanly reset\n+\t * so now it can lift its quarantine and restore full functionality.\n+\t */\n+\tif (ops->reset_device_done)\n+\t\tops->reset_device_done(&pdev->dev);\n+\n \t/* Re-attach RID domain back to group->domain */\n \tif (group->domain != group->blocking_domain) {\n \t\tWARN_ON(__iommu_attach_device(group->domain, &pdev->dev,\n","prefixes":["v3","03/11"]}