{"id":2224143,"url":"http://patchwork.ozlabs.org/api/patches/2224143/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20260416232619.1083145-1-elias.rosberg@hotmail.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260416232619.1083145-1-elias.rosberg@hotmail.com>","list_archive_url":null,"date":"2026-04-16T23:26:18","name":"riscv: Allow Zcmp push/pop when shrink-wrap-separate is inactive","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"43860ba5162d2842091739bc426d2205973ffa47","submitter":{"id":93172,"url":"http://patchwork.ozlabs.org/api/people/93172/?format=json","name":"Elias Rosberg","email":"elias.rosberg.dev@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20260416232619.1083145-1-elias.rosberg@hotmail.com/mbox/","series":[{"id":500216,"url":"http://patchwork.ozlabs.org/api/series/500216/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=500216","date":"2026-04-16T23:26:18","name":"riscv: Allow Zcmp push/pop when shrink-wrap-separate is inactive","version":1,"mbox":"http://patchwork.ozlabs.org/series/500216/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224143/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224143/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=cnyaPCUZ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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The previous heuristic was overly blunt, disabling Zcmp for\nany function where shrink-wrap-separate was enabled, without checking if\nthe optimization was utilized for that specific frame.\n\ngcc/\n\t* config/riscv/riscv.cc (riscv_avoid_multi_push): Check if\n\tshrink-wrap-separate was actually used for the current\n\tfunction.\n\ngcc/testsuite/\n\t* gcc.target/riscv/pr112478.c: Update scan-assembler patterns.\n\t* gcc.target/riscv/zcmp_shrink_wrap_separate.c: Likewise.\n\t* gcc.target/riscv/zcmp_no_shrink_wrap.c: New test.\n\t* gcc.target/riscv/zcmp_shrink_wrap.c: New test.\n\t* gcc.target/riscv/zcmp_shrink_wrap_sep.c: New test.\n\n2026-04-17 Elias Rosberg \n---\nHello,\n\nI am a student researcher and this is my first GCC patch. \nI identified a missed optimization where Zcmp cm.push/cm.pop \ninstructions were being suppressed at -O2 due to an overly blunt\ncheck for shrink-wrap-separate.\n\nEven when shrink-wrap-separate is enabled globally, it is not always applied to \nevery function. This patch adds a condition to allow Zcmp instructions in \nfunctions where shrink-wrap-separate did not actually trigger. \nThis makes cm.push/cm.pop generate for -O2 in:\n\n1. Functions that save callee saved registers, but have no shrink-wrapping \n2. Functions that save callee saved registers, and use standard monolithic\nshrink-wrapping.\n\nThe fix still suppresses generation of cm.push/cm.pop in:\n\n3. Functions that save callee saved registers, but use shrink-wrap-separate.\n\nIt has passed the full C-torture execute/compile and target RISC-V\nsuite with no regressions. Quick testing on SQLite3 shows a ~1.7% reduction \nin .text size for riscv32-unknown-elf at -O2.\n\nI do not have write access. So if this were to get approved, \nI will need help with the commit\n\n\n\n---\n gcc/config/riscv/riscv.cc | 3 ++-\n gcc/testsuite/gcc.target/riscv/pr112478.c | 2 +-\n .../gcc.target/riscv/zcmp_no_shrink_wrap.c | 18 ++++++++++++++++\n .../gcc.target/riscv/zcmp_shrink_wrap.c | 20 ++++++++++++++++++\n .../gcc.target/riscv/zcmp_shrink_wrap_sep.c | 21 +++++++++++++++++++\n .../riscv/zcmp_shrink_wrap_separate.c | 2 +-\n 6 files changed, 63 insertions(+), 3 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/riscv/zcmp_no_shrink_wrap.c\n create mode 100644 gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap.c\n create mode 100644 gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_sep.c","diff":"diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc\nindex 8a39c791c..e7d74128f 100644\n--- a/gcc/config/riscv/riscv.cc\n+++ b/gcc/config/riscv/riscv.cc\n@@ -8624,7 +8624,8 @@ riscv_avoid_multi_push (const struct riscv_frame_info *frame)\n || cfun->machine->interrupt_handler_p || cfun->machine->varargs_size != 0\n || crtl->args.pretend_args_size != 0\n || (use_shrink_wrapping_separate ()\n-\t && !riscv_avoid_shrink_wrapping_separate ())\n+\t && !riscv_avoid_shrink_wrapping_separate ()\n+\t && crtl->shrink_wrapped_separate)\n || (frame->mask & ~MULTI_PUSH_GPR_MASK))\n return true;\n \ndiff --git a/gcc/testsuite/gcc.target/riscv/pr112478.c b/gcc/testsuite/gcc.target/riscv/pr112478.c\nindex 0bbde20b7..771d7337f 100644\n--- a/gcc/testsuite/gcc.target/riscv/pr112478.c\n+++ b/gcc/testsuite/gcc.target/riscv/pr112478.c\n@@ -5,4 +5,4 @@ void foo() {\n asm volatile(\"# \" : ::\"ra\");\n }\n \n-/* { dg-final { scan-assembler \"s(w|d)\\[ \\t\\]*ra\" } } */\n+/* { dg-final { scan-assembler \"s(w|d)\\[ \\t\\]*ra|cm\\\\.push\\[ \\t\\]*\\\\{.*ra.*\\\\}\" } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/zcmp_no_shrink_wrap.c b/gcc/testsuite/gcc.target/riscv/zcmp_no_shrink_wrap.c\nnew file mode 100644\nindex 000000000..8d6703165\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/zcmp_no_shrink_wrap.c\n@@ -0,0 +1,18 @@\n+/* { dg-do compile } */ \n+/* { dg-options \"-O2 -march=rv32imac_zicsr_zifencei_zcmp -mabi=ilp32 -fshrink-wrap\" } */\n+/* { dg-skip-if \"\" { *-*-* } {\"-O0\" \"-O1\" \"-Os\" \"-Og\" \"-O3\" \"-Oz\" \"-flto\"} } */\n+\n+extern void\n+bar (int);\n+\n+/* Verify that Zcmp cm.push is used at -O2 when shrink-wrapping is \n+ active but no early return exists. */\n+void\n+foo (int a)\n+{\n+ bar (a);\n+ bar (a);\n+}\n+\n+/* { dg-final { scan-assembler \"cm\\\\.push\" } } */\n+/* { dg-final { scan-assembler \"cm\\\\.pop\" } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap.c b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap.c\nnew file mode 100644\nindex 000000000..aaa5881db\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap.c\n@@ -0,0 +1,20 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -march=rv32imac_zicsr_zifencei_zcmp -mabi=ilp32 -fshrink-wrap\" } */\n+/* { dg-skip-if \"\" { *-*-* } { \"-O0\" \"-O1\" \"-Os\" \"-Og\" \"-O3\" \"-Oz\" \"-flto\" } } */\n+\n+extern void \n+bar (int);\n+\n+/* Verify that Zcmp cm.push is used at -O2 even when a simple \n+ shrink-wrap early return is present. */\n+void\n+foo (int a)\n+{\n+ if (a == 0)\n+ return;\n+ bar (a);\n+ bar (a);\n+}\n+\n+/* { dg-final { scan-assembler \"cm\\\\.push\" } } */\n+/* { dg-final { scan-assembler \"cm\\\\.pop\" } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_sep.c b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_sep.c\nnew file mode 100644\nindex 000000000..f4cd2e68c\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_sep.c\n@@ -0,0 +1,21 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -march=rv32imac_zicsr_zifencei_zcmp -mabi=ilp32 -fshrink-wrap-separate\" } */\n+/* { dg-skip-if \"\" { *-*-* } { \"-O0\" \"-O1\" \"-Os\" \"-Og\" \"-O3\" \"-Oz\" \"-flto\" } } */\n+\n+/* Verify that Zcmp cm.push is NOT used when shrink-wrap-separate is \n+ actively moving individual callee-saved registers. */\n+void\n+foo (int a)\n+{\n+ if (a == 1)\n+ {\n+ register int s0 asm (\"s0\") = 1;\n+ asm volatile (\"\" : : \"r\" (s0));\n+ return;\n+ }\n+ register int s1 asm (\"s1\") = 2;\n+ asm volatile (\"\" : : \"r\" (s1));\n+}\n+\n+/* { dg-final { scan-assembler-not \"cm\\\\.push\" } } */\n+/* { dg-final { scan-assembler-not \"cm\\\\.pop\" } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate.c b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate.c\nindex 035bc32ce..a5036712a 100644\n--- a/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate.c\n+++ b/gcc/testsuite/gcc.target/riscv/zcmp_shrink_wrap_separate.c\n@@ -90,4 +90,4 @@ calc_func (signed short *pdata, core_results *res)\n }\n }\n \n-/* { dg-final { scan-assembler-not \"cm\\.push\" } } */\n+/* { dg-final { scan-assembler \"cm\\\\.push\" } } */\n","prefixes":[]}