{"id":2224133,"url":"http://patchwork.ozlabs.org/api/patches/2224133/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416200702.2374709-3-git@aaronesau.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260416200702.2374709-3-git@aaronesau.com>","list_archive_url":null,"date":"2026-04-16T20:07:02","name":"[2/2] hw/cxl: add missing bounds checks in Set Feature for PPR and sparing","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"13e9f6ad71386eabd2fe4520c78bc2febc61c979","submitter":{"id":93010,"url":"http://patchwork.ozlabs.org/api/people/93010/?format=json","name":"Aaron Esau","email":"aaron1esau@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416200702.2374709-3-git@aaronesau.com/mbox/","series":[{"id":500210,"url":"http://patchwork.ozlabs.org/api/series/500210/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500210","date":"2026-04-16T20:07:00","name":"hw/cxl: Fix two OOB access bugs in CXL mailbox commands","version":1,"mbox":"http://patchwork.ozlabs.org/series/500210/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224133/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224133/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=oDpgxx9x;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-ot1-x329.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Thu, 16 Apr 2026 18:38:06 -0400","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Aaron Esau \n\ncmd_features_set_feature() is missing bounds validation on the offset and\ndata length for several feature UUIDs before their memcpy calls. The\npatrol_scrub and ecs cases correctly check:\n\n if ((uint32_t)hdr->offset + bytes_to_copy >\n sizeof(ct3d->..._wr_attrs))\n return CXL_MBOX_INVALID_PAYLOAD_LENGTH;\n\nBut the soft_ppr, hard_ppr, cacheline_sparing, row_sparing,\nbank_sparing, and rank_sparing cases are missing this check. Since\nbytes_to_copy is derived from the full mailbox payload length (up to\n2048 bytes) and the write-attribute structs are only a few bytes each,\na guest can overflow into adjacent CXLType3Dev fields.\n\nAdd the same bounds check pattern to all six affected feature handlers.\n\nCc: qemu-stable@nongnu.org\nFixes: 5e5a86bab8 (\"hw/cxl: Add support for Maintenance command and Post Package Repair (PPR)\")\nFixes: da5cafdc4d (\"hw/cxl: Add emulation for memory sparing control feature\")\nReported-by: Aaron Esau \nSigned-off-by: Aaron Esau \n---\n hw/cxl/cxl-mailbox-utils.c | 30 ++++++++++++++++++++++++++++++\n 1 file changed, 30 insertions(+)","diff":"diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c\nindex 0adf1e72c8..5fabfcbbab 100644\n--- a/hw/cxl/cxl-mailbox-utils.c\n+++ b/hw/cxl/cxl-mailbox-utils.c\n@@ -1814,6 +1814,11 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd,\n return CXL_MBOX_UNSUPPORTED;\n }\n \n+ if ((uint32_t)hdr->offset + bytes_to_copy >\n+ sizeof(ct3d->soft_ppr_wr_attrs)) {\n+ return CXL_MBOX_INVALID_PAYLOAD_LENGTH;\n+ }\n+\n memcpy((uint8_t *)&ct3d->soft_ppr_wr_attrs + hdr->offset,\n sppr_write_attrs, bytes_to_copy);\n set_feat_info->data_size += bytes_to_copy;\n@@ -1833,6 +1838,11 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd,\n return CXL_MBOX_UNSUPPORTED;\n }\n \n+ if ((uint32_t)hdr->offset + bytes_to_copy >\n+ sizeof(ct3d->hard_ppr_wr_attrs)) {\n+ return CXL_MBOX_INVALID_PAYLOAD_LENGTH;\n+ }\n+\n memcpy((uint8_t *)&ct3d->hard_ppr_wr_attrs + hdr->offset,\n hppr_write_attrs, bytes_to_copy);\n set_feat_info->data_size += bytes_to_copy;\n@@ -1852,6 +1862,11 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd,\n return CXL_MBOX_UNSUPPORTED;\n }\n \n+ if ((uint32_t)hdr->offset + bytes_to_copy >\n+ sizeof(ct3d->cacheline_sparing_wr_attrs)) {\n+ return CXL_MBOX_INVALID_PAYLOAD_LENGTH;\n+ }\n+\n memcpy((uint8_t *)&ct3d->cacheline_sparing_wr_attrs + hdr->offset,\n mem_sparing_write_attrs, bytes_to_copy);\n set_feat_info->data_size += bytes_to_copy;\n@@ -1870,6 +1885,11 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd,\n return CXL_MBOX_UNSUPPORTED;\n }\n \n+ if ((uint32_t)hdr->offset + bytes_to_copy >\n+ sizeof(ct3d->row_sparing_wr_attrs)) {\n+ return CXL_MBOX_INVALID_PAYLOAD_LENGTH;\n+ }\n+\n memcpy((uint8_t *)&ct3d->row_sparing_wr_attrs + hdr->offset,\n mem_sparing_write_attrs, bytes_to_copy);\n set_feat_info->data_size += bytes_to_copy;\n@@ -1888,6 +1908,11 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd,\n return CXL_MBOX_UNSUPPORTED;\n }\n \n+ if ((uint32_t)hdr->offset + bytes_to_copy >\n+ sizeof(ct3d->bank_sparing_wr_attrs)) {\n+ return CXL_MBOX_INVALID_PAYLOAD_LENGTH;\n+ }\n+\n memcpy((uint8_t *)&ct3d->bank_sparing_wr_attrs + hdr->offset,\n mem_sparing_write_attrs, bytes_to_copy);\n set_feat_info->data_size += bytes_to_copy;\n@@ -1906,6 +1931,11 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd,\n return CXL_MBOX_UNSUPPORTED;\n }\n \n+ if ((uint32_t)hdr->offset + bytes_to_copy >\n+ sizeof(ct3d->rank_sparing_wr_attrs)) {\n+ return CXL_MBOX_INVALID_PAYLOAD_LENGTH;\n+ }\n+\n memcpy((uint8_t *)&ct3d->rank_sparing_wr_attrs + hdr->offset,\n mem_sparing_write_attrs, bytes_to_copy);\n set_feat_info->data_size += bytes_to_copy;\n","prefixes":["2/2"]}