{"id":2224123,"url":"http://patchwork.ozlabs.org/api/patches/2224123/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416210508.30686-3-philmd@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260416210508.30686-3-philmd@linaro.org>","list_archive_url":null,"date":"2026-04-16T21:05:06","name":"[v4,2/4] target/mips: Remove unnecessary target_ulong uses in LD/ST Multiple","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d46150b65c7a3beadf4de6541bc6db50f39bd7fe","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416210508.30686-3-philmd@linaro.org/mbox/","series":[{"id":500206,"url":"http://patchwork.ozlabs.org/api/series/500206/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500206","date":"2026-04-16T21:05:04","name":"target/mips: Replace cpu_ld/st_mmuidx_ra() calls in LD/ST Multiple","version":4,"mbox":"http://patchwork.ozlabs.org/series/500206/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224123/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224123/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=K0qsYkd7;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::435;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"@do_r31 is a boolean, @base_reglist a size (size_t) and @i an\nunsigned index.\n\nSigned-off-by: Philippe Mathieu-Daudé \n---\n target/mips/tcg/ldst_helper.c | 32 ++++++++++++--------------------\n 1 file changed, 12 insertions(+), 20 deletions(-)","diff":"diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c\nindex 7be2cad89d6..fdc192e9c14 100644\n--- a/target/mips/tcg/ldst_helper.c\n+++ b/target/mips/tcg/ldst_helper.c\n@@ -228,13 +228,11 @@ void helper_lwm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,\n {\n MemOpIdx oi = memop_idx;\n unsigned mem_idx = get_mmuidx(oi);\n- target_ulong base_reglist = reglist & 0xf;\n- target_ulong do_r31 = reglist & 0x10;\n+ size_t base_reglist = reglist & 0xf;\n+ bool do_r31 = reglist & 0x10;\n \n if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {\n- target_ulong i;\n-\n- for (i = 0; i < base_reglist; i++) {\n+ for (unsigned i = 0; i < base_reglist; i++) {\n env->active_tc.gpr[multiple_regs[i]] =\n (target_long)cpu_ldl_mmuidx_ra(env, addr, mem_idx, GETPC());\n addr += 4;\n@@ -252,13 +250,11 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,\n {\n MemOpIdx oi = memop_idx;\n unsigned mem_idx = get_mmuidx(oi);\n- target_ulong base_reglist = reglist & 0xf;\n- target_ulong do_r31 = reglist & 0x10;\n+ size_t base_reglist = reglist & 0xf;\n+ bool do_r31 = !!(reglist & 0x10);\n \n if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {\n- target_ulong i;\n-\n- for (i = 0; i < base_reglist; i++) {\n+ for (unsigned i = 0; i < base_reglist; i++) {\n cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]],\n mem_idx, GETPC());\n addr += 4;\n@@ -276,13 +272,11 @@ void helper_ldm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,\n {\n MemOpIdx oi = memop_idx;\n unsigned mem_idx = get_mmuidx(oi);\n- target_ulong base_reglist = reglist & 0xf;\n- target_ulong do_r31 = reglist & 0x10;\n+ size_t base_reglist = reglist & 0xf;\n+ bool do_r31 = !!(reglist & 0x10);\n \n if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {\n- target_ulong i;\n-\n- for (i = 0; i < base_reglist; i++) {\n+ for (unsigned i = 0; i < base_reglist; i++) {\n env->active_tc.gpr[multiple_regs[i]] =\n cpu_ldq_mmuidx_ra(env, addr, mem_idx, GETPC());\n addr += 8;\n@@ -300,13 +294,11 @@ void helper_sdm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,\n {\n MemOpIdx oi = memop_idx;\n unsigned mem_idx = get_mmuidx(oi);\n- target_ulong base_reglist = reglist & 0xf;\n- target_ulong do_r31 = reglist & 0x10;\n+ size_t base_reglist = reglist & 0xf;\n+ bool do_r31 = !!(reglist & 0x10);\n \n if (base_reglist > 0 && base_reglist <= ARRAY_SIZE(multiple_regs)) {\n- target_ulong i;\n-\n- for (i = 0; i < base_reglist; i++) {\n+ for (unsigned i = 0; i < base_reglist; i++) {\n cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]],\n mem_idx, GETPC());\n addr += 8;\n","prefixes":["v4","2/4"]}