{"id":2224116,"url":"http://patchwork.ozlabs.org/api/patches/2224116/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416210305.2255579-10-brian.cain@oss.qualcomm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260416210305.2255579-10-brian.cain@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-16T21:03:05","name":"[v5,9/9] tests/qtest: Add hexagon boot-serial-test","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"c07da303ebe9b60b182d1b0670cca726a1707d3d","submitter":{"id":89839,"url":"http://patchwork.ozlabs.org/api/people/89839/?format=json","name":"Brian Cain","email":"brian.cain@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416210305.2255579-10-brian.cain@oss.qualcomm.com/mbox/","series":[{"id":500204,"url":"http://patchwork.ozlabs.org/api/series/500204/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500204","date":"2026-04-16T21:03:01","name":"Hexagon system emulation - Part 3/3","version":5,"mbox":"http://patchwork.ozlabs.org/series/500204/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224116/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224116/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=NH4u7sum;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=MhyviaxW;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mx0b-0031df01.pphosted.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Add boot-serial-test support for Hexagon architecture using the virt\nmachine.\n\nReviewed-by: Fabiano Rosas \nSigned-off-by: Brian Cain \n---\n tests/qtest/boot-serial-test.c | 8 ++++++++\n tests/qtest/meson.build | 2 ++\n 2 files changed, 10 insertions(+)","diff":"diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c\nindex bcd0a9c50e7..37fee7a91c4 100644\n--- a/tests/qtest/boot-serial-test.c\n+++ b/tests/qtest/boot-serial-test.c\n@@ -142,6 +142,13 @@ static const uint8_t kernel_stm32vldiscovery[] = {\n 0x04, 0x38, 0x01, 0x40 /* 0x40013804 = USART1 TXD */\n };\n \n+static const uint8_t bios_hexagon[] = {\n+ 0x00, 0x40, 0x00, 0x01, /* immext(#0x10000000) */\n+ 0x00, 0xc0, 0x00, 0x78, /* r0 = ##0x10000000 */\n+ 0x54, 0xc0, 0x00, 0x3c, /* memb(r0+#0) = #0x54 Write 'T' */\n+ 0xf8, 0xff, 0xff, 0x59 /* jump 0x0 ; Loop back to start */\n+};\n+\n typedef struct testdef {\n const char *arch; /* Target architecture */\n const char *machine; /* Name of the machine */\n@@ -194,6 +201,7 @@ static const testdef_t tests[] = {\n { \"arm\", \"microbit\", \"\", \"T\", sizeof(kernel_nrf51), kernel_nrf51 },\n { \"arm\", \"stm32vldiscovery\", \"\", \"T\",\n sizeof(kernel_stm32vldiscovery), kernel_stm32vldiscovery },\n+ { \"hexagon\", \"virt\", \"\", \"TT\", sizeof(bios_hexagon), NULL, bios_hexagon },\n \n { NULL }\n };\ndiff --git a/tests/qtest/meson.build b/tests/qtest/meson.build\nindex be4fa627b5f..baa1195371b 100644\n--- a/tests/qtest/meson.build\n+++ b/tests/qtest/meson.build\n@@ -290,6 +290,8 @@ qtests_riscv64 = ['riscv-csr-test'] + \\\n config_all_devices.has_key('CONFIG_RISCV_IOMMU') ?\n ['iommu-riscv-test'] : [])\n \n+qtests_hexagon = ['boot-serial-test']\n+\n qos_test_ss = ss.source_set()\n qos_test_ss.add(\n 'ac97-test.c',\n","prefixes":["v5","9/9"]}