{"id":2223955,"url":"http://patchwork.ozlabs.org/api/patches/2223955/?format=json","web_url":"http://patchwork.ozlabs.org/project/ltp/patch/20260416121638.11858-1-sachinp@linux.ibm.com/","project":{"id":59,"url":"http://patchwork.ozlabs.org/api/projects/59/?format=json","name":"Linux Test Project development","link_name":"ltp","list_id":"ltp.lists.linux.it","list_email":"ltp@lists.linux.it","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260416121638.11858-1-sachinp@linux.ibm.com>","list_archive_url":null,"date":"2026-04-16T12:16:37","name":"[v6,1/2] io_uring: Add test for READV and WRITEV operations","commit_ref":null,"pull_url":null,"state":"needs-review-ack","archived":false,"hash":"6e9271ea176993a6ddb1bc6248ba09b7309ac77e","submitter":{"id":83212,"url":"http://patchwork.ozlabs.org/api/people/83212/?format=json","name":"Sachin Sant","email":"sachinp@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/ltp/patch/20260416121638.11858-1-sachinp@linux.ibm.com/mbox/","series":[{"id":500148,"url":"http://patchwork.ozlabs.org/api/series/500148/?format=json","web_url":"http://patchwork.ozlabs.org/project/ltp/list/?series=500148","date":"2026-04-16T12:16:38","name":"[v6,1/2] io_uring: Add test for READV and WRITEV operations","version":1,"mbox":"http://patchwork.ozlabs.org/series/500148/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223955/comments/","check":"success","checks":"http://patchwork.ozlabs.org/api/patches/2223955/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","ltp@lists.linux.it"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","ltp@picard.linux.it"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=OlP8atb9;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.linux.it\n (client-ip=2001:1418:10:5::2; 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charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Errors-To":"ltp-bounces+incoming=patchwork.ozlabs.org@lists.linux.it","Sender":"\"ltp\" "},"content":"Add a test to validate vectored read and write operations using io_uring.\n\n1. IORING_OP_WRITEV - Writing data using multiple buffers (scatter)\n2. IORING_OP_READV - Reading data into multiple buffers (gather)\n3. Data integrity verification across multiple iovecs\n4. Edge cases with different iovec configurations including zero\n buffer length\n\nAdditionally merge io_uring_init_buffer_pattern() into unified\ninit_iovec_buffers() function that supports both rotating and\nsimple character patterns\n\nSigned-off-by: Sachin Sant \n---\nV5 changes:\n- Add clear_iovec_buffers() at the top of run()\n- Link to v4 https://lore.kernel.org/ltp/20260416062302.15804-1-sachinp@linux.ibm.com/T/\n\nV4 changes:\n- Updated commit message to remove references to non-existent function\n- Removed extra blank line before test_writev_readv()\n- Link to v3 https://lore.kernel.org/ltp/20260416042531.81093-1-sachinp@linux.ibm.com/T/\n\nV3 changes (2/3 io_uring04 only):\n- 1/3 and 3/3 from the patch series already merged.\n- Merged prepare_read_buffers() and clear_iovec_buffers() into\nsingle clear_iovec_buffers() function\n- Merged io_uring_init_buffer_pattern() into unified\ninit_iovec_buffers() function that supports both rotating and\nsimple character patterns\n- Removed io_uring_init_buffer_pattern() from io_uring_common.h as it's\nonly used in io_uring04.c\n- Link to V2: https://lore.kernel.org/ltp/b4653e3f-ac9b-4a24-8d3f-51677c488e8c@linux.ibm.com/T/\n\nV2 changes:\n- Use guarded buffer(including iovec) allocation\n- Move setup/cleanup code from run to appropriate path\n- Add a function to map the OP to the enum name\n- Define and use generic cleanup functions\n- Add a buffer size 0 in the middle of the iovec\n- Simplify setup_io_uring_test to use common code.\n- Link to V1: https://lore.kernel.org/ltp/20260320124742.75946-1-sachinp@linux.ibm.com/T/#t\n\nChanges after RFC patch series:\n- Addressed review comments\n- Refactored io_uring01 test to use common code\n- Removed git tags\n- Link to RFC: https://lore.kernel.org/ltp/20260318110328.52031-1-sachinp@linux.ibm.com/T/#t\n\n---\n runtest/syscalls | 1 +\n testcases/kernel/syscalls/io_uring/.gitignore | 1 +\n .../kernel/syscalls/io_uring/io_uring04.c | 223 ++++++++++++++++++\n 3 files changed, 225 insertions(+)\n create mode 100644 testcases/kernel/syscalls/io_uring/io_uring04.c","diff":"diff --git a/runtest/syscalls b/runtest/syscalls\nindex 5025b259f..aa7a91d97 100644\n--- a/runtest/syscalls\n+++ b/runtest/syscalls\n@@ -1901,6 +1901,7 @@ membarrier01 membarrier01\n io_uring01 io_uring01\n io_uring02 io_uring02\n io_uring03 io_uring03\n+io_uring04 io_uring04\n \n # Tests below may cause kernel memory leak\n perf_event_open03 perf_event_open03\ndiff --git a/testcases/kernel/syscalls/io_uring/.gitignore b/testcases/kernel/syscalls/io_uring/.gitignore\nindex 9382ae413..36cd24662 100644\n--- a/testcases/kernel/syscalls/io_uring/.gitignore\n+++ b/testcases/kernel/syscalls/io_uring/.gitignore\n@@ -1,3 +1,4 @@\n /io_uring01\n /io_uring02\n /io_uring03\n+/io_uring04\ndiff --git a/testcases/kernel/syscalls/io_uring/io_uring04.c b/testcases/kernel/syscalls/io_uring/io_uring04.c\nnew file mode 100644\nindex 000000000..6b6bb711d\n--- /dev/null\n+++ b/testcases/kernel/syscalls/io_uring/io_uring04.c\n@@ -0,0 +1,223 @@\n+// SPDX-License-Identifier: GPL-2.0-or-later\n+/*\n+ * Copyright (C) 2026 IBM\n+ * Author: Sachin Sant \n+ */\n+/*\\\n+ * Test IORING_OP_READV and IORING_OP_WRITEV operations.\n+ *\n+ * This test validates vectored read and write operations using io_uring.\n+ * It tests:\n+ * 1. IORING_OP_WRITEV - Writing data using multiple buffers (scatter)\n+ * 2. IORING_OP_READV - Reading data into multiple buffers (gather)\n+ * 3. Data integrity verification across multiple iovecs\n+ * 4. Edge cases with different iovec configurations\n+ */\n+\n+#include \"io_uring_common.h\"\n+\n+#define TEST_FILE \"io_uring_test_file\"\n+#define QUEUE_DEPTH 2\n+#define NUM_VECS 4\n+#define VEC_SIZE 1024\n+#define VAR_BUF1_SIZE 512\n+#define VAR_BUF2_SIZE 1024\n+#define VAR_BUF3_SIZE 256\n+\n+static struct iovec *write_iovs, *read_iovs;\n+static struct iovec *var_write_iovs, *var_read_iovs;\n+static struct io_uring_submit s;\n+static sigset_t sig;\n+\n+/*\n+ * Initialize iovec buffers with pattern\n+ * @iovs: array of iovec structures\n+ * @nvecs: number of iovecs\n+ * @base_char: base character for pattern\n+ * @use_rotating: if true, use rotating pattern; if false, use simple repeat\n+ */\n+static void init_iovec_buffers(struct iovec *iovs, int nvecs,\n+\t\t\t\tchar base_char, int use_rotating)\n+{\n+\tint i;\n+\tsize_t j;\n+\tchar *buf;\n+\n+\tfor (i = 0; i < nvecs; i++) {\n+\t\tif (iovs[i].iov_len == 0)\n+\t\t\tcontinue;\n+\n+\t\tbuf = (char *)iovs[i].iov_base;\n+\t\tif (use_rotating) {\n+\t\t\t/* Each vector has a different rotating pattern */\n+\t\t\tfor (j = 0; j < iovs[i].iov_len; j++)\n+\t\t\t\tbuf[j] = base_char + i + (j % 26);\n+\t\t} else {\n+\t\t\tfor (j = 0; j < iovs[i].iov_len; j++)\n+\t\t\t\tbuf[j] = base_char + i;\n+\t\t}\n+\t}\n+}\n+\n+static void clear_iovec_buffers(struct iovec *iovs, int nvecs)\n+{\n+\tint i;\n+\n+\tfor (i = 0; i < nvecs; i++)\n+\t\tmemset(iovs[i].iov_base, 0, iovs[i].iov_len);\n+}\n+\n+static void verify_iovec_data(struct iovec *write_iovs, struct iovec *read_iovs,\n+\t\t\t int nvecs, const char *test_name)\n+{\n+\tint i;\n+\tsize_t j;\n+\n+\tfor (i = 0; i < nvecs; i++) {\n+\t\tif (write_iovs[i].iov_len != read_iovs[i].iov_len) {\n+\t\t\ttst_res(TFAIL, \"%s: iovec %d length mismatch: write=%zu read=%zu\",\n+\t\t\t\ttest_name, i, write_iovs[i].iov_len, read_iovs[i].iov_len);\n+\t\t\treturn;\n+\t\t}\n+\n+\t\tif (memcmp(write_iovs[i].iov_base, read_iovs[i].iov_base,\n+\t\t\t write_iovs[i].iov_len) != 0) {\n+\t\t\ttst_res(TFAIL, \"%s: data mismatch in vector %d\", test_name, i);\n+\t\t\tfor (j = 0; j < write_iovs[i].iov_len && j < 64; j++) {\n+\t\t\t\tchar *wbuf = (char *)write_iovs[i].iov_base;\n+\t\t\t\tchar *rbuf = (char *)read_iovs[i].iov_base;\n+\t\t\t\tif (wbuf[j] != rbuf[j]) {\n+\t\t\t\t\ttst_res(TINFO, \"Vector %d: first mismatch at \"\n+\t\t\t\t\t\t\"offset %zu: wrote 0x%02x, read 0x%02x\",\n+\t\t\t\t\t\ti, j, wbuf[j], rbuf[j]);\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t\treturn;\n+\t\t}\n+\t}\n+\n+\ttst_res(TPASS, \"%s: data integrity verified across %d vectors\",\n+\t\ttest_name, nvecs);\n+}\n+\n+static void test_writev_readv(void)\n+{\n+\tint fd;\n+\tint total_size = NUM_VECS * VEC_SIZE;\n+\n+\ttst_res(TINFO, \"Testing IORING_OP_WRITEV and IORING_OP_READV\");\n+\n+\tfd = SAFE_OPEN(TEST_FILE, O_RDWR | O_CREAT | O_TRUNC, 0644);\n+\n+\ttst_res(TINFO, \"Writing %d bytes using %d vectors\", total_size, NUM_VECS);\n+\tio_uring_do_vec_io_op(&s, fd, IORING_OP_WRITEV, write_iovs, NUM_VECS,\n+\t\t\t 0, total_size, &sig);\n+\n+\tSAFE_FSYNC(fd);\n+\n+\ttst_res(TINFO, \"Reading %d bytes using %d vectors\", total_size, NUM_VECS);\n+\tio_uring_do_vec_io_op(&s, fd, IORING_OP_READV, read_iovs, NUM_VECS,\n+\t\t\t 0, total_size, &sig);\n+\n+\tverify_iovec_data(write_iovs, read_iovs, NUM_VECS, \"Basic vectored I/O\");\n+\n+\tSAFE_CLOSE(fd);\n+}\n+\n+static void test_partial_vectors(void)\n+{\n+\tint fd;\n+\tint half_size = 2 * VEC_SIZE;\n+\n+\ttst_res(TINFO, \"Testing partial vector operations\");\n+\n+\tfd = SAFE_OPEN(TEST_FILE, O_RDWR | O_CREAT | O_TRUNC, 0644);\n+\n+\t/* Write first half using first 2 vectors at offset 0 */\n+\tio_uring_do_vec_io_op(&s, fd, IORING_OP_WRITEV, write_iovs, 2, 0,\n+\t\t\t half_size, &sig);\n+\n+\t/* Write second half using next 2 vectors at offset half_size */\n+\tio_uring_do_vec_io_op(&s, fd, IORING_OP_WRITEV, &write_iovs[2], 2,\n+\t\t\t half_size, half_size, &sig);\n+\n+\tSAFE_FSYNC(fd);\n+\n+\t/* Read back entire file using all 4 vectors */\n+\tio_uring_do_vec_io_op(&s, fd, IORING_OP_READV, read_iovs, NUM_VECS, 0,\n+\t\t\t NUM_VECS * VEC_SIZE, &sig);\n+\n+\tverify_iovec_data(write_iovs, read_iovs, NUM_VECS, \"Partial vector I/O\");\n+\n+\tSAFE_CLOSE(fd);\n+}\n+\n+static void test_varying_sizes(void)\n+{\n+\tint fd;\n+\tint expected_size = VAR_BUF1_SIZE + VAR_BUF2_SIZE + VAR_BUF3_SIZE;\n+\n+\ttst_res(TINFO, \"Testing vectors with varying sizes including zero-length buffer\");\n+\n+\tinit_iovec_buffers(var_write_iovs, 4, 'X', 0);\n+\n+\tclear_iovec_buffers(var_read_iovs, 4);\n+\n+\tfd = SAFE_OPEN(TEST_FILE, O_RDWR | O_CREAT | O_TRUNC, 0644);\n+\n+\tio_uring_do_vec_io_op(&s, fd, IORING_OP_WRITEV, var_write_iovs, 4, 0,\n+\t\t\t expected_size, &sig);\n+\n+\tSAFE_FSYNC(fd);\n+\n+\tio_uring_do_vec_io_op(&s, fd, IORING_OP_READV, var_read_iovs, 4, 0,\n+\t\t\t expected_size, &sig);\n+\n+\tverify_iovec_data(var_write_iovs, var_read_iovs, 4, \"Varying size vector I/O with zero-length buffer\");\n+\n+\tSAFE_CLOSE(fd);\n+}\n+\n+static void run(void)\n+{\n+\tclear_iovec_buffers(read_iovs, NUM_VECS);\n+\n+\ttest_writev_readv();\n+\ttest_partial_vectors();\n+\ttest_varying_sizes();\n+}\n+\n+static void setup(void)\n+{\n+\tio_uring_setup_supported_by_kernel();\n+\tsigemptyset(&sig);\n+\tmemset(&s, 0, sizeof(s));\n+\tio_uring_setup_queue(&s, QUEUE_DEPTH, 0);\n+\tinit_iovec_buffers(write_iovs, NUM_VECS, 'A', 1);\n+\tclear_iovec_buffers(read_iovs, NUM_VECS);\n+}\n+\n+static void cleanup(void)\n+{\n+\tio_uring_cleanup_queue(&s, QUEUE_DEPTH);\n+}\n+\n+static struct tst_test test = {\n+\t.test_all = run,\n+\t.setup = setup,\n+\t.cleanup = cleanup,\n+\t.needs_tmpdir = 1,\n+\t.bufs = (struct tst_buffers []) {\n+\t\t{&write_iovs, .iov_sizes = (int[]){VEC_SIZE, VEC_SIZE, VEC_SIZE, VEC_SIZE, -1}},\n+\t\t{&read_iovs, .iov_sizes = (int[]){VEC_SIZE, VEC_SIZE, VEC_SIZE, VEC_SIZE, -1}},\n+\t\t{&var_write_iovs, .iov_sizes = (int[]){VAR_BUF1_SIZE, 0, VAR_BUF2_SIZE, VAR_BUF3_SIZE, -1}},\n+\t\t{&var_read_iovs, .iov_sizes = (int[]){VAR_BUF1_SIZE, 0, VAR_BUF2_SIZE, VAR_BUF3_SIZE, -1}},\n+\t\t{}\n+\t},\n+\t.save_restore = (const struct tst_path_val[]) {\n+\t\t{\"/proc/sys/kernel/io_uring_disabled\", \"0\",\n+\t\t\tTST_SR_SKIP_MISSING | TST_SR_TCONF_RO},\n+\t\t{}\n+\t}\n+};\n","prefixes":["v6","1/2"]}