{"id":2223918,"url":"http://patchwork.ozlabs.org/api/patches/2223918/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/0bd3279ca0bbf7c01548e3b4e7a9c8fdbdbe4ee1.1776339451.git.matheus.bernardino@oss.qualcomm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<0bd3279ca0bbf7c01548e3b4e7a9c8fdbdbe4ee1.1776339451.git.matheus.bernardino@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-16T11:38:57","name":"[v5,08/16] target/hexagon: add v68 HVX IEEE float misc insns","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"3a2b0608432248956b4e638e7296773b4b6f7a80","submitter":{"id":90606,"url":"http://patchwork.ozlabs.org/api/people/90606/?format=json","name":"Matheus Tavares Bernardino","email":"matheus.bernardino@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/0bd3279ca0bbf7c01548e3b4e7a9c8fdbdbe4ee1.1776339451.git.matheus.bernardino@oss.qualcomm.com/mbox/","series":[{"id":500137,"url":"http://patchwork.ozlabs.org/api/series/500137/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500137","date":"2026-04-16T11:38:50","name":"hexagon: add missing HVX float instructions","version":5,"mbox":"http://patchwork.ozlabs.org/series/500137/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223918/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223918/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=hweQ38cQ;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=ID/Cp4Uu;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n 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","To":"qemu-devel@nongnu.org","Cc":"richard.henderson@linaro.org, ale@rev.ng, anjo@rev.ng,\n brian.cain@oss.qualcomm.com, ltaylorsimpson@gmail.com,\n marco.liebel@oss.qualcomm.com, philmd@linaro.org,\n quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com","Subject":"[PATCH v5 08/16] target/hexagon: add v68 HVX IEEE float misc insns","Date":"Thu, 16 Apr 2026 04:38:57 -0700","Message-Id":"\n <0bd3279ca0bbf7c01548e3b4e7a9c8fdbdbe4ee1.1776339451.git.matheus.bernardino@oss.qualcomm.com>","X-Mailer":"git-send-email 2.37.2","In-Reply-To":"","References":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Proofpoint-ORIG-GUID":"hSS_mjQBZDNIgRfIjzICZuqPXX3Ca9g3","X-Proofpoint-GUID":"hSS_mjQBZDNIgRfIjzICZuqPXX3Ca9g3","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDE2MDExMCBTYWx0ZWRfX20zseLpbVoDJ\n dnonAcY2ta8+kDeGPwuG1RDkxo5yNXyNHM4y9kBgUBoww8yH2p3nFkIEza5HZIF77g2t7N4IUpe\n 5Js4wOHbUurBkPR5daqbaWLHWqMDz9Cc4jEVYguxl1i2AycCdJJSXxLVY7oDdXSAjRxLu+7vQoi\n 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","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Add HVX IEEE floating-point miscellaneous instructions:\n- vassign_fp (vfmv): vector move\n- vfneg_hf, vfneg_sf: vector floating-point negate\n- vabs_hf, vabs_sf: vector absolute value\n\nReviewed-by: Taylor Simpson \nSigned-off-by: Matheus Tavares Bernardino \n---\n target/hexagon/imported/mmvec/encode_ext.def | 7 +++++++\n target/hexagon/imported/mmvec/ext.idef | 12 ++++++++++++\n 2 files changed, 19 insertions(+)","diff":"diff --git a/target/hexagon/imported/mmvec/encode_ext.def b/target/hexagon/imported/mmvec/encode_ext.def\nindex d7f50db778..72daf8724c 100644\n--- a/target/hexagon/imported/mmvec/encode_ext.def\n+++ b/target/hexagon/imported/mmvec/encode_ext.def\n@@ -833,4 +833,11 @@ DEF_ENC(V6_vmin_sf,\"00011111110vvvvvPP1uuuuu010ddddd\")\n DEF_ENC(V6_vmax_hf,\"00011111110vvvvvPP1uuuuu011ddddd\")\n DEF_ENC(V6_vmin_hf,\"00011111110vvvvvPP1uuuuu100ddddd\")\n \n+/* IEEE FP move, negate, abs instructions */\n+DEF_ENC(V6_vassign_fp,\"00011110--0-0110PP1uuuuu001ddddd\")\n+DEF_ENC(V6_vfneg_hf,\"00011110--0-0110PP1uuuuu010ddddd\")\n+DEF_ENC(V6_vfneg_sf,\"00011110--0-0110PP1uuuuu011ddddd\")\n+DEF_ENC(V6_vabs_hf,\"00011110--0-0110PP1uuuuu100ddddd\")\n+DEF_ENC(V6_vabs_sf,\"00011110--0-0110PP1uuuuu101ddddd\")\n+\n #endif /* NO MMVEC */\ndiff --git a/target/hexagon/imported/mmvec/ext.idef b/target/hexagon/imported/mmvec/ext.idef\nindex 0e9cace203..1b16ed0628 100644\n--- a/target/hexagon/imported/mmvec/ext.idef\n+++ b/target/hexagon/imported/mmvec/ext.idef\n@@ -3034,6 +3034,18 @@ ITERATOR_INSN_ANY_SLOT_2SRC(16,vmin_hf,\"Vd32.hf=vmin(Vu32.hf,Vv32.hf)\", \\\n \"Vector min of hf input\", VdV.hf[i] = qf_min_hf(VuV.hf[i], VvV.hf[i], \\\n \t&env->hvx_fp_status))\n \n+/* IEEE FP move, negate, abs instructions */\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vassign_fp, \"Vd32.w=vfmv(Vu32.w)\", \\\n+ \"Vector IEEE move\", VdV.w[i] = VuV.w[i])\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vfneg_hf, \"Vd32.hf=vfneg(Vu32.hf)\", \\\n+ \"Vector IEEE neg: hf\", VdV.hf[i] = float16_chs(VuV.hf[i]))\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vfneg_sf, \"Vd32.sf=vfneg(Vu32.sf)\", \\\n+ \"Vector IEEE neg: sf\", VdV.sf[i] = float32_chs(VuV.sf[i]))\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(16, vabs_hf, \"Vd32.hf=vabs(Vu32.hf)\", \\\n+ \"Vector IEEE abs: hf\", VdV.hf[i] = float16_abs(VuV.hf[i]))\n+ITERATOR_INSN_IEEE_FP_16_32_LATE(32, vabs_sf, \"Vd32.sf=vabs(Vu32.sf)\", \\\n+ \"Vector IEEE abs: sf\", VdV.sf[i] = float32_abs(VuV.sf[i]))\n+\n /******************************************************************************\n DEBUG Vector/Register Printing\n ******************************************************************************/\n","prefixes":["v5","08/16"]}