{"id":2223903,"url":"http://patchwork.ozlabs.org/api/patches/2223903/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260416111422.183860-10-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260416111422.183860-10-sherry.sun@nxp.com>","list_archive_url":null,"date":"2026-04-16T11:14:19","name":"[V13,09/12] arm64: dts: imx8mp: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b1a6f411f80cfaaf191c956e56c1641e0cc4f6a0","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260416111422.183860-10-sherry.sun@nxp.com/mbox/","series":[{"id":500134,"url":"http://patchwork.ozlabs.org/api/series/500134/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=500134","date":"2026-04-16T11:14:11","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":13,"mbox":"http://patchwork.ozlabs.org/series/500134/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223903/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223903/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V13 09/12] arm64: dts: imx8mp: Add Root Port node and PERST\n property","Date":"Thu, 16 Apr 2026 19:14:19 +0800","Message-Id":"<20260416111422.183860-10-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260416111422.183860-1-sherry.sun@nxp.com>","References":"<20260416111422.183860-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"MA0PR01CA0076.INDPRD01.PROD.OUTLOOK.COM\n (2603:1096:a01:ad::17) To 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7HvC1W0bPVwY/clV2ST9ZvkJMSgdZ/EmfPOpmKSwKKS+3jbhjl4TtctwvXIHGS9cy4pdno297arPRIgjydV1xadY1eaX7eq7e5F0jkBHoBs9FiQF/auWarEjh6/DZFhYJQt2/A3gYldXWtSLUA/QQcwcMzqD0T2zgMEJ0WsTOFtwLPr4RPeKzyPKE0JU4gB7pk3myzyw0eqYfH/UNX0Jh7wMcoE2Ch2p8SjHmv8W040J0wpqDSyahdsDcwAsU7b18qMF0KW2MSvORtXgAUc8f9BF+dNEnFm8crxY+gFbulwGnIDM7+IyKZPI+SAlaAJVcKzl20dtFWD4cG9Sq4Kqc3qdn1Hd/nee0YZeemOi3TzTf4sXba1NI+olW9iVMYv1IFf0XFTQvlcHk4TwlentL1Kp0ZkViA7QXSTfHNg7E3YPnuYxcPNZVi2G0TdMLTjmUBFzOZqBh0lJp0pgoRXMy+2Y1XmHImWzsBm0LuYznSaP1isFBEWo4OTkW8tZDhKvaBtL2c7OzC/QBBN/zgGaJeIwiZ12MchSr51l3xyTiQmo/5I0bUgHMxxyLpcqK/HFjTQ+9CNAmcELO2/B8UzrpjcYAGn5jNZ+EPZmHV/O5azj5qWaO0IK9dQKoxmZ9g1G3SlR7XlVwHpNqm7+lFEa5YxmgxaBcoCPzFef9PUmWgbYbZaWZRQzQrGIkWMn+Qi2/DARwjgZ9hr2y5AhYy2/H8OV+6IZ1ImVc9P6jmj3GzQHxJt5GRjXbPwx0cSorUZnwAJ1QF01bn4gBaMUoEJ3ZBfodo/Yt2EMsb0Clc5P2zrFc0uuqt0m/7Mt5O+Lzec2IbD0bnghhlV6Rm992w7AyjTs8ZMWf4J7N/iZsKNRJFKaa6H/mxWRoie3nPFOoiUNdQPm+6iyS3NVBdyADEM9t0oYbQWy31qpYtUYdqb1nkN2+MJMKjZAS2y5OIfLmWK2kXsG123hleebCdiJXKZeabzLY1CP97PaRHR2znohqhGsNfXK1AEQ7P/kF9OC9yS8/PmcXUWcaKYUCyudju9XIQKI5OGAkVqM5tXolOipWhBjEnxf/MPJg9mmu8sZJ51jKH//vv28Mg+45hPRI5cYodpyfOKlCcLe7FXa9q/dGusk8JCsp0Awe1Ug81hzjR9lPIVaVcKaXxvlUlkD1JsA4WviJ81XdnD6S0ODK6/yWZM7hevYTB1w2hKtP/8qTFjwOzmOefURfBw/cVxv/rlZLbzJYENSDKamv0R5MNR2FSTJrfHSUV4LkBf3Dico9MQJQ4ZHltvUuZhycbSQEf5Q7OcrOL68GJlhIFby/EWNqPKc9ggttYUHyghn+p22KUNZwaXqahnZKrbfTgoyoDQ+/9vRFEQ1bBq2+oKPsRIZBK6zr05+Q5hHI7pf+uL65zkvxs6sF+1mMouLf55oM7c+9xHFMjjYIw98u6DHsNZYUAZINZKb7jD2WJtiy6tqOkRPsPfMuT/qiYdJhfUbGMdDdLqp33okyEGVptB+Hhw0P2lSEJNMDhFAt4sT/xbGaV2NSDmp+uaDFXKtvokd7vRaKDnzwbMPTVxZ6Psm2d3zmzFSGTas2HfxPhQBleTs4gHd4IypoQmnADquHclFyIutUNXDvAb/3Nv6h14hzZwMDMbpw6FExwrhEfwVn20W/rqOU+ll+Mye4Av0Oa61EJ4F8Nku44F3YjajYg7keLp0Jr5zPpe7zlJuD6SqmbUI9ighcAwCGCcgQuWbFYs3ougbAA==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n b0ec9c14-fe50-4a69-563e-08de9ba93f53","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"16 Apr 2026 11:13:54.8115\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n C5atVCZ6FIk5RoPO8g4GfOG4GxHv6U6zDp+npJAjXm9f4LB3KJUHvCJ45HmSBp1CEOjMXQgVCS/jLTVYoOwxMw==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DBBPR04MB7897"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 5 +++++\n arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\nindex 2feb5b18645c..a7f3acdc36d1 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\n+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\n@@ -770,6 +770,7 @@ &pcie_phy {\n &pcie0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie0>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcie0>;\n \tvpcie3v3aux-supply = <®_pcie0>;\n@@ -783,6 +784,10 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcie0_port0 {\n+\treset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;\n+};\n+\n &pwm1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pwm1>;\ndiff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi\nindex 90d7bb8f5619..5ce2825182fd 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi\n@@ -2265,6 +2265,17 @@ pcie0: pcie: pcie@33800000 {\n \t\t\tphys = <&pcie_phy>;\n \t\t\tphy-names = \"pcie-phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie0_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\tpcie0_ep: pcie_ep: pcie-ep@33800000 {\n","prefixes":["V13","09/12"]}