{"id":2223553,"url":"http://patchwork.ozlabs.org/api/patches/2223553/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260415152152.3048491-4-u-kumar1@ti.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260415152152.3048491-4-u-kumar1@ti.com>","list_archive_url":null,"date":"2026-04-15T15:21:52","name":"[v2,3/3] arch: mach-k3: j784s4_init: Add workaround for errata i2437","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"feb5c4be544a555f3d8c3c14f5e66057b62c84b0","submitter":{"id":86225,"url":"http://patchwork.ozlabs.org/api/people/86225/?format=json","name":"Udit Kumar","email":"u-kumar1@ti.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260415152152.3048491-4-u-kumar1@ti.com/mbox/","series":[{"id":500003,"url":"http://patchwork.ozlabs.org/api/series/500003/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=500003","date":"2026-04-15T15:21:49","name":"j721s2: j784s4: Add workaround for errata i2437","version":2,"mbox":"http://patchwork.ozlabs.org/series/500003/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223553/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223553/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=selector1 header.b=WZfW2rLK;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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helo=lewvzet200.ext.ti.com; pr=C","From":"Udit Kumar ","To":", , ","CC":", , , ,\n , Udit Kumar ","Subject":"[PATCH v2 3/3] arch: mach-k3: j784s4_init: Add workaround for errata\n i2437","Date":"Wed, 15 Apr 2026 20:51:52 +0530","Message-ID":"<20260415152152.3048491-4-u-kumar1@ti.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260415152152.3048491-1-u-kumar1@ti.com>","References":"<20260415152152.3048491-1-u-kumar1@ti.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-C2ProcessedOrg":"333ef613-75bf-4e12-a4b1-8e3623f5dcea","X-EOPAttributedMessage":"0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"MN1PEPF0000ECD9:EE_|PH8PR10MB6454:EE_","X-MS-Office365-Filtering-Correlation-Id":"f12c58ec-37b6-4b2f-2600-08de9b02c82e","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"BCL:0;\n ARA:13230040|1800799024|36860700016|376014|82310400026|18002099003|22082099003|56012099003;","X-Microsoft-Antispam-Message-Info":"\n Trg0QcIhP0WK4ILY2S/T8zXuChH9u1bYxp9zNMXoTwy3je4pMVyZ5khhmmOLs8NFR+HTw9AlY6BACPFeaeinl74wRY2PfCo4h2lgGOvNGWgYtrEZVHYkSshZuDwkljNRnjelo32ir1sqO34t21OyN9gi7bmYpAsw1rQegChHF5dzp3UgvcfpCrnU6VdQ2mZ7K4eCTB9DGQVEOga+u67rhMVATeK22ctajtVS0EjcFtfhy8/nH/7AKXp7P1NrYMcck9+HACJmO64lY3Ot4hlr/T6IE6e7BJzJAtsobq7qJhatTaMvBRQLka9guEEJCLYjnVh4ObQOCXkeWpvf9oUwQqh/GZll2NVQuj6AOWmPmlCQdegF61qANr7uAT+nDYiTLdQBo8kRac2voWrOF+z210ZEgd0A9ewf5g1HUD/eE3u3RRMdOdlzYifNq1G2UF05W5r5Xcdjh80stNiWIvOpcNzLmGOM7ZRX6eckcMo6FSh2eP+/JlE2SUa01dL1jODsZKjS2TcSsJxHQh1VvQd2/R1fxG3O6u2P088tp3gibzMS5ptBH3TTLrG0yiwELpoHy+5VL2kuPZYEqxuebY0SQOeXfH7oIBDrcaCfXIQLACtCias4fV7qqyXKxf7ZVihGblWrWT+ERyqyiacXp+0jIc+7abpn+R3uXG5aq/bA3QpVam+JNdJKOyVBNgR8nDCLe1GAFS55Wbf8KmbN9cj4MmxaPe72T5NdsDIjrYHWovUnpPrAzRWcfc5Dwo8DEvGbnAj45In9Hc8L16jJ+4GD+w==","X-Forefront-Antispam-Report":"CIP:198.47.23.194; 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Ip=[198.47.23.194];\n Helo=[lewvzet200.ext.ti.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n MN1PEPF0000ECD9.namprd02.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"PH8PR10MB6454","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Neha Malcom Francis \n\nAdd the workaround proposed for J784S4 errata i2437 (link) for SE\nclock-gating turning off too early. Without this, a hardware bug present\nin C7120 leads to C7120 CPU hanging.\n\nLink: https://www.ti.com/lit/pdf/sprz536\nSigned-off-by: Neha Malcom Francis \nSigned-off-by: Udit Kumar \n---\n arch/arm/mach-k3/j784s4/j784s4_init.c | 39 +++++++++++++++++++++++++++\n 1 file changed, 39 insertions(+)","diff":"diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c\nindex 53f152ccd9c..507b7ab685a 100644\n--- a/arch/arm/mach-k3/j784s4/j784s4_init.c\n+++ b/arch/arm/mach-k3/j784s4/j784s4_init.c\n@@ -45,6 +45,15 @@\n #define NB_THREADMAP_BIT1\t\t\t\tBIT(1)\n #define NB_THREADMAP_BIT2\t\t\t\tBIT(2)\n \n+/*\n+ * RAT mapping for errata ID: i2437\n+ */\n+#define RAT_ERRATA_2437_BASE_REGION0\t\t0x40f90000\n+#define RAT_ERRATA_2437_IN_ADDR\t\t\t0xc0000000\n+#define RAT_ERRATA_2437_OUT_ADDR_U\t\t0x0000004d\n+#define RAT_ERRATA_2437_OUT_ADDR_L\t\t0x21000000\n+#define RAT_ERRATA_2437_CTRL\t\t\t0x80000010\n+\n struct fwl_data infra_cbass0_fwls[] = {\n \t{ \"PSC0\", 5, 1 },\n \t{ \"PLL_CTRL0\", 6, 1 },\n@@ -322,6 +331,36 @@ void board_init_f(ulong dummy)\n \t\tsetup_navss_nb();\n \n \tsetup_qos();\n+\n+\tif (IS_ENABLED(CONFIG_CPU_V7R)) {\n+\t\t/*\n+\t\t * Errata ID i2437 SE Clock-Gating Turning Off Too Early\n+\t\t *\n+\t\t * A hardware bug is present in the C7120 Streaming Engine top level\n+\t\t * clock gating logic that can lead to the C7120 CPU hanging.\n+\n+\t\t * Workaround: The DSP__DEBUG_CLKEN_OVERRIDE fields of the\n+\t\t * COMPUTE_CLUSTER_CFG_WRAP_0_CC_CNTRL register (where COREID is the\n+\t\t * name of the specific C7120 core) must be enabled before power-up\n+\t\t * of the C7120 core to override all clock-gating.\n+\t\t */\n+\n+\t\t/* Setup RAT mapping */\n+\t\tdebug(\"Errata i2437: Use RAT for COMPUTE_CLUSTER_CFG_WRAP_0_CC_CNTRL register\\n\");\n+\t\twritel_verify(RAT_ERRATA_2437_IN_ADDR, RAT_ERRATA_2437_BASE_REGION0 + 0x24);\n+\t\twritel_verify(RAT_ERRATA_2437_OUT_ADDR_L, RAT_ERRATA_2437_BASE_REGION0 + 0x28);\n+\t\twritel_verify(RAT_ERRATA_2437_OUT_ADDR_U, RAT_ERRATA_2437_BASE_REGION0 + 0x2c);\n+\t\twritel_verify(RAT_ERRATA_2437_CTRL, RAT_ERRATA_2437_BASE_REGION0 + 0x20);\n+\n+\t\t/* Enable DSP_X_DEBUG_CLKEN_OVERRIDE for C71x cores */\n+\t\twritel_verify(0xF00, RAT_ERRATA_2437_IN_ADDR + 0x200);\n+\n+\t\t/* Clear RAT mapping */\n+\t\twritel_verify(0, RAT_ERRATA_2437_BASE_REGION0 + 0x20);\n+\t\twritel_verify(0, RAT_ERRATA_2437_BASE_REGION0 + 0x24);\n+\t\twritel_verify(0, RAT_ERRATA_2437_BASE_REGION0 + 0x28);\n+\t\twritel_verify(0, RAT_ERRATA_2437_BASE_REGION0 + 0x2c);\n+\t}\n }\n \n u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)\n","prefixes":["v2","3/3"]}