{"id":2223525,"url":"http://patchwork.ozlabs.org/api/patches/2223525/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415132926.58878-7-mohamed@unpredictable.fr/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260415132926.58878-7-mohamed@unpredictable.fr>","list_archive_url":null,"date":"2026-04-15T13:29:22","name":"[v2,06/10] target: i386: HLT type that ignores EFLAGS.IF","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"84702bb1fae36d14aa22e6e9ab321ac3e80fd624","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415132926.58878-7-mohamed@unpredictable.fr/mbox/","series":[{"id":499989,"url":"http://patchwork.ozlabs.org/api/series/499989/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499989","date":"2026-04-15T13:29:20","name":"whpx: i386: Some more changes","version":2,"mbox":"http://patchwork.ozlabs.org/series/499989/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223525/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223525/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=Y7U+4IVH;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=outbound.pv.icloud.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"The TLFS says:\n\n> A partition which possesses the AccessGuestIdleMsr privilege may trigger\n> entry into the virtual processor idle sleep state through a read to the\n> hypervisor-defined MSR HV_X64_MSR_GUEST_IDLE. The virtual processor will\n> be woken when an interrupt arrives, regardless of whether the interrupt\n> is enabled on the virtual processor or not.\n\nMeanwhile, Windows 24H2+ calls this MSR anyway without the privilege being set.\n\nAdd the infrastructure to support it on the generic QEMU side.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n target/i386/cpu.c | 10 ++++++----\n target/i386/cpu.h |  2 ++\n 2 files changed, 8 insertions(+), 4 deletions(-)","diff":"diff --git a/target/i386/cpu.c b/target/i386/cpu.c\nindex 0000093fa3..b18e40666e 100644\n--- a/target/i386/cpu.c\n+++ b/target/i386/cpu.c\n@@ -10482,13 +10482,15 @@ int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request)\n                    (((env->hflags2 & HF2_VINTR_MASK) &&\n                      (env->hflags2 & HF2_HIF_MASK)) ||\n                     (!(env->hflags2 & HF2_VINTR_MASK) &&\n-                     (env->eflags & IF_MASK &&\n-                      !(env->hflags & HF_INHIBIT_IRQ_MASK))))) {\n+                     ((env->eflags & IF_MASK &&\n+                      !(env->hflags & HF_INHIBIT_IRQ_MASK))\n+                        || env->hflags2 & HF2_HYPERV_HLT_MASK)))) {\n             return CPU_INTERRUPT_HARD;\n         } else if (env->hflags2 & HF2_VGIF_MASK) {\n             if((interrupt_request & CPU_INTERRUPT_VIRQ) &&\n-                   (env->eflags & IF_MASK) &&\n-                   !(env->hflags & HF_INHIBIT_IRQ_MASK)) {\n+                   ((env->eflags & IF_MASK &&\n+                      !(env->hflags & HF_INHIBIT_IRQ_MASK))\n+                        || env->hflags2 & HF2_HYPERV_HLT_MASK)) {\n                         return CPU_INTERRUPT_VIRQ;\n             }\n         }\ndiff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex 0b539155c4..67f508dc10 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -225,6 +225,7 @@ typedef enum X86Seg {\n #define HF2_NPT_SHIFT            6 /* Nested Paging enabled */\n #define HF2_IGNNE_SHIFT          7 /* Ignore CR0.NE=0 */\n #define HF2_VGIF_SHIFT           8 /* Can take VIRQ*/\n+#define HF2_HYPERV_HLT_SHIFT     9 /* Hyper-V HV_X64_MSR_GUEST_IDLE */\n \n #define HF2_GIF_MASK            (1 << HF2_GIF_SHIFT)\n #define HF2_HIF_MASK            (1 << HF2_HIF_SHIFT)\n@@ -235,6 +236,7 @@ typedef enum X86Seg {\n #define HF2_NPT_MASK            (1 << HF2_NPT_SHIFT)\n #define HF2_IGNNE_MASK          (1 << HF2_IGNNE_SHIFT)\n #define HF2_VGIF_MASK           (1 << HF2_VGIF_SHIFT)\n+#define HF2_HYPERV_HLT_MASK     (1 << HF2_HYPERV_HLT_SHIFT)\n \n #define CR0_PE_SHIFT 0\n #define CR0_MP_SHIFT 1\n","prefixes":["v2","06/10"]}