{"id":2223408,"url":"http://patchwork.ozlabs.org/api/patches/2223408/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260415090959.53672-4-fengchengwen@huawei.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260415090959.53672-4-fengchengwen@huawei.com>","list_archive_url":null,"date":"2026-04-15T09:09:58","name":"[3/4] vfio/pci: Add PCIe TPH GET_ST interface","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ea5f45e673ad74b3051180dd2b3d4b1745112d98","submitter":{"id":92756,"url":"http://patchwork.ozlabs.org/api/people/92756/?format=json","name":"fengchengwen","email":"fengchengwen@huawei.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260415090959.53672-4-fengchengwen@huawei.com/mbox/","series":[{"id":499948,"url":"http://patchwork.ozlabs.org/api/series/499948/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=499948","date":"2026-04-15T09:09:55","name":"vfio/pci: Add PCIe TPH support","version":1,"mbox":"http://patchwork.ozlabs.org/series/499948/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223408/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223408/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=x62MKrVp;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-pci+bounces-52547-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=\"x62MKrVp\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=113.46.200.217","smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=huawei.com"],"Received":["from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fwb3P4qGyz1yHd\n\tfor ; Wed, 15 Apr 2026 19:10:57 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 4D84F3045556\n\tfor ; Wed, 15 Apr 2026 09:10:34 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 5C61F3290A0;\n\tWed, 15 Apr 2026 09:10:25 +0000 (UTC)","from canpmsgout02.his.huawei.com (canpmsgout02.his.huawei.com\n [113.46.200.217])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id C5AB431AF24;\n\tWed, 15 Apr 2026 09:10:21 +0000 (UTC)","from mail.maildlp.com (unknown [172.19.162.144])\n\tby canpmsgout02.his.huawei.com (SkyGuard) with ESMTPS id 4fwZv958mdzcZyv;\n\tWed, 15 Apr 2026 17:03:49 +0800 (CST)","from kwepemk500009.china.huawei.com (unknown [7.202.194.94])\n\tby mail.maildlp.com (Postfix) with ESMTPS id C531740572;\n\tWed, 15 Apr 2026 17:10:19 +0800 (CST)","from localhost.localdomain (10.50.163.32) by\n kwepemk500009.china.huawei.com (7.202.194.94) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1544.11; Wed, 15 Apr 2026 17:10:19 +0800"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776244225; cv=none;\n b=QFk0fMWYVcH9Gw/NxzJl5akXFJQq1f5fk5P8mCw3mQjNTIZ5dOJ042JgCeqf+3B8GYH0V4Il7G7T2w8uRf0kyOr1mK36+AKyJuchpwiPH6Kesg0lnXYyGLRaIgiRYc8UbwypGzn9ja4eSzSDtFViOkdzAweEXpHOM10JJDHE6ks=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776244225; c=relaxed/simple;\n\tbh=WIgAkWxtAIcgXs1vCFODGNkrPbrTFroRnRS9/HsQtww=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=swyrWJAlXVbZ6eEQ8fvq/dhvxcBXCoaO4WhQSCoANf5haorrOm2Mk3ju1cU0gruZvGwVQm/JwkFZBkoI3UXX1dW3socrOGCjMtub2svnHfijdQv7JvYo169zwBDcZPlkrBx4x5mKnK/YhnVk5K+4EXmpALLoikJlwnzY2xOuzgY=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com;\n spf=pass smtp.mailfrom=huawei.com;\n dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=x62MKrVp; arc=none smtp.client-ip=113.46.200.217","dkim-signature":"v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=5QfjeQz9YOg3DX/Bp6P0CGlTymDMSy3ZDfahGgsXTss=;\n\tb=x62MKrVp5MNMkEoUV4KVgrXSEYHTMMnFX4AcyKaXzg1IsdthoTmBYyxltsVPuciwf+RgvV2u8\n\tqGHCMFBVOtdOjVHm5Weix9Dbwh3byZlLLMhL8+tlx/CK+f1Iq7Dv34PHc4bUdU1ay4MrwqUJHDT\n\tE7MKyjndlFVcszCkUjat6Ko=","From":"Chengwen Feng ","To":", ","CC":", ,\n\t, Chengwen Feng ","Subject":"[PATCH 3/4] vfio/pci: Add PCIe TPH GET_ST interface","Date":"Wed, 15 Apr 2026 17:09:58 +0800","Message-ID":"<20260415090959.53672-4-fengchengwen@huawei.com>","X-Mailer":"git-send-email 2.17.1","In-Reply-To":"<20260415090959.53672-1-fengchengwen@huawei.com>","References":"<20260415090959.53672-1-fengchengwen@huawei.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain","X-ClientProxiedBy":"kwepems200001.china.huawei.com (7.221.188.67) To\n kwepemk500009.china.huawei.com (7.202.194.94)"},"content":"Add support to batch get CPU's Steering Tags for Device Specific Mode.\n\nSigned-off-by: Chengwen Feng \n---\n drivers/vfio/pci/vfio_pci_core.c | 51 ++++++++++++++++++++++++++++++++\n 1 file changed, 51 insertions(+)","diff":"diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c\nindex 0f96b41779cd..3fe8a48b1cc0 100644\n--- a/drivers/vfio/pci/vfio_pci_core.c\n+++ b/drivers/vfio/pci/vfio_pci_core.c\n@@ -1524,6 +1524,55 @@ static int vfio_pci_tph_disable(struct vfio_pci_core_device *vdev)\n \treturn 0;\n }\n \n+static int vfio_pci_tph_get_st(struct vfio_pci_core_device *vdev,\n+\t\t\t struct vfio_device_pci_tph_op *op,\n+\t\t\t void __user *uarg)\n+{\n+\tstruct vfio_pci_tph_entry *ents;\n+\tstruct vfio_pci_tph_st st;\n+\tenum tph_mem_type mtype;\n+\tsize_t size;\n+\tint i, err;\n+\n+\tif (copy_from_user(&st, uarg, sizeof(st)))\n+\t\treturn -EFAULT;\n+\n+\tif (!st.count || st.count > 2048)\n+\t\treturn -EINVAL;\n+\n+\tsize = st.count * sizeof(*ents);\n+\tents = kvmalloc(size, GFP_KERNEL);\n+\tif (!ents)\n+\t\treturn -ENOMEM;\n+\n+\tif (copy_from_user(ents, uarg + sizeof(st), size)) {\n+\t\terr = -EFAULT;\n+\t\tgoto out;\n+\t}\n+\n+\tfor (i = 0; i < st.count; i++) {\n+\t\tif (ents[i].mem_type == VFIO_PCI_TPH_MEM_TYPE_VM) {\n+\t\t\tmtype = TPH_MEM_TYPE_VM;\n+\t\t} else if (ents[i].mem_type == VFIO_PCI_TPH_MEM_TYPE_PM) {\n+\t\t\tmtype = TPH_MEM_TYPE_PM;\n+\t\t} else {\n+\t\t\terr = -EINVAL;\n+\t\t\tgoto out;\n+\t\t}\n+\n+\t\terr = pcie_tph_get_cpu_st(vdev->pdev, mtype, ents[i].cpu, &ents[i].st);\n+\t\tif (err)\n+\t\t\tgoto out;\n+\t}\n+\n+\tif (copy_to_user(uarg + sizeof(st), ents, size))\n+\t\terr = -EFAULT;\n+\n+out:\n+\tkvfree(ents);\n+\treturn err;\n+}\n+\n static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\t\t void __user *uarg)\n {\n@@ -1544,6 +1593,8 @@ static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\treturn vfio_pci_tph_enable(vdev, &op, uarg + minsz);\n \tcase VFIO_PCI_TPH_DISABLE:\n \t\treturn vfio_pci_tph_disable(vdev);\n+\tcase VFIO_PCI_TPH_GET_ST:\n+\t\treturn vfio_pci_tph_get_st(vdev, &op, uarg + minsz);\n \tdefault:\n \t\t/* Other ops are not implemented yet */\n \t\treturn -EINVAL;\n","prefixes":["3/4"]}