{"id":2223165,"url":"http://patchwork.ozlabs.org/api/patches/2223165/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260414155433.483186-9-magnuskulke@linux.microsoft.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260414155433.483186-9-magnuskulke@linux.microsoft.com>","list_archive_url":null,"date":"2026-04-14T15:54:32","name":"[v4,8/9] target/i386/mshv: filter out CET bits in cpuid","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"e121b094da7d68bc8d526b660fb62da3f074939a","submitter":{"id":90753,"url":"http://patchwork.ozlabs.org/api/people/90753/?format=json","name":"Magnus Kulke","email":"magnuskulke@linux.microsoft.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260414155433.483186-9-magnuskulke@linux.microsoft.com/mbox/","series":[{"id":499862,"url":"http://patchwork.ozlabs.org/api/series/499862/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499862","date":"2026-04-14T15:54:24","name":"Support QEMU cpu models in MSHV accelerator","version":4,"mbox":"http://patchwork.ozlabs.org/series/499862/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223165/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223165/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=linux.microsoft.com header.i=@linux.microsoft.com\n header.a=rsa-sha256 header.s=default header.b=F2E2a8ia;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Tue, 14 Apr 2026 11:55:00 -0400","from DESKTOP-TUU1E5L.localdomain (unknown [167.220.208.32])\n by linux.microsoft.com (Postfix) with ESMTPSA id 36E1020B6F08;\n Tue, 14 Apr 2026 08:54:56 -0700 (PDT)"],"DKIM-Filter":"OpenDKIM Filter v2.11.0 linux.microsoft.com 36E1020B6F08","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1776182097;\n bh=BfKDb+dVA/asufHlSsXXPnkczeWKZmJTJrXtuB6+16s=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=F2E2a8iaocZKu5bIIXpqqTYhAYsEirhibmmBKTgKv1Tj0nMHaBSQrXZNeAWDd1dJY\n xd68yc3e3aTfy0thIaHvsZz4WCLEmH0FX/Tuoii+psSasYqAg8ffhTXrAMm8M00esS\n 7Ppo/b67CoB8ncP1GddKvlr+mFd2Hm9Z7q+rQ2Wg=","From":"Magnus Kulke <magnuskulke@linux.microsoft.com>","To":"qemu-devel@nongnu.org","Cc":"Wei Liu <wei.liu@kernel.org>, Wei Liu <liuwe@microsoft.com>,\n Magnus Kulke <magnuskulke@linux.microsoft.com>,\n Magnus Kulke <magnuskulke@microsoft.com>, Zhao Liu <zhao1.liu@intel.com>,\n Paolo Bonzini <pbonzini@redhat.com>","Subject":"[PATCH v4 8/9] target/i386/mshv: filter out CET bits in cpuid","Date":"Tue, 14 Apr 2026 17:54:32 +0200","Message-Id":"<20260414155433.483186-9-magnuskulke@linux.microsoft.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260414155433.483186-1-magnuskulke@linux.microsoft.com>","References":"<20260414155433.483186-1-magnuskulke@linux.microsoft.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=13.77.154.182;\n envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com","X-Spam_score_int":"-42","X-Spam_score":"-4.3","X-Spam_bar":"----","X-Spam_report":"(-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"e46dcef1d0 introduced CET_U/CET_S xstate bits in the ExtSaveArea. The\nresponse in EBX of a 0x4,1 cpuid query will contain a size contingent on\nwhat the guest enabled in the IA32_XSS MSR (compacted xsave size).\n\nSince the MSHV accelerator currently responds with static answers to\n0x4d cpuid queries, we'll have to disable those bits, even if the host\nsupports them.\n\nSigned-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>\nReviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>\n---\n target/i386/mshv/mshv-cpu.c | 19 +++++++++++++++++++\n 1 file changed, 19 insertions(+)","diff":"diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c\nindex ee25eb5f6f..2c66a52709 100644\n--- a/target/i386/mshv/mshv-cpu.c\n+++ b/target/i386/mshv/mshv-cpu.c\n@@ -1663,6 +1663,25 @@ uint32_t mshv_get_supported_cpuid(uint32_t func, uint32_t idx, int reg)\n     if (func == 0x01       && reg == R_ECX) {\n         ret &= ~CPUID_EXT_VMX;\n     }\n+\n+    /*\n+     * MSHV currently uses static CPUID intercept results for leaf 0xD.\n+     * However there are feature-responses that are dynamic based on what a\n+     * guest enables in XCR0 and XSS, such as CET shadow stack.\n+     *\n+     * A guest which doesn't know about those features yet would encounter an\n+     * unexpcted CPUID[0xD,1].EBX (compactes XSAVE size) and either fail\n+     * or gracefully degrade by not using XSAVE at all.\n+     *\n+     * To avoid this, we filter out supervisor xstate features.\n+     */\n+    if (func == 0x07 && idx == 0 && reg == R_ECX) {\n+        ret &= ~CPUID_7_0_ECX_CET_SHSTK;\n+    }\n+    if (func == 0x07 && idx == 0 && reg == R_EDX) {\n+        ret &= ~CPUID_7_0_EDX_CET_IBT;\n+    }\n+\n     return ret;\n }\n \n","prefixes":["v4","8/9"]}