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a=xqWC_Br6kY4A:10 a=A5OVakUREuEA:10\n a=GoEa3M9JfhUA:10 a=VkNPw1HP01LnGYTKEx00:22 a=jiCTI4zE5U7BLdzWsZGv:22\n a=3I1J8UUJPc9JN9BFgKH3:22 a=yPCof4ZbAAAA:8 a=urj103uPPKj4aODTR_0A:9 cc=ntf\n awl=host:12291","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"From: Claudiu Zissulescu \n\nImplement MD_CLEAN_MEMTAG_RANGE hook to clean up any residual memtags\nafter an exception is taken.\n\nThe patch contains the necessary bits to check if the system has MTE\nsupport, if yes, the MD_CLEAN_MEMTAG_RANGE hook is removing the tags\nbetween the two addresses provided. A test is also provided.\n\nSigned-off-by: Claudiu Zissulescu \n---\n gcc/testsuite/g++.target/aarch64/try-catch.C | 71 ++++++++++++++++++++\n libgcc/config/aarch64/linux-unwind.h | 68 +++++++++++++++++++\n 2 files changed, 139 insertions(+)\n create mode 100644 gcc/testsuite/g++.target/aarch64/try-catch.C","diff":"diff --git a/gcc/testsuite/g++.target/aarch64/try-catch.C b/gcc/testsuite/g++.target/aarch64/try-catch.C\nnew file mode 100644\nindex 00000000000..75559c8a2c4\n--- /dev/null\n+++ b/gcc/testsuite/g++.target/aarch64/try-catch.C\n@@ -0,0 +1,71 @@\n+/* { dg-do run } */\n+/* { dg-require-effective-target memtag_exec } */\n+/* { dg-additional-options \"-fsanitize=memtag-stack -march=armv8.5-a+memtag -O2\" } */\n+\n+#include \n+#include \n+#include \n+\n+extern \"C\"\n+{\n+ static void\n+ optimization_barrier (void *arg)\n+ {\n+ asm volatile(\"\" : : \"r\"(arg) : \"memory\");\n+ }\n+\n+ void handler (int nSig)\n+ {\n+ /* We hit the exception. Return error. */\n+ exit (1);\n+ }\n+\n+ static void setHandler (void)\n+ {\n+ signal (SIGSEGV, handler);\n+ }\n+\n+ void __attribute__((noinline))\n+ foo (void)\n+ {\n+ char x[15];\n+ optimization_barrier(x);\n+ throw 15;\n+ }\n+\n+ void __attribute__((noinline))\n+ hwasan_read (char *p, int size)\n+ {\n+ volatile char sink;\n+ for (int i = 0; i < size; ++i)\n+ sink = p[i];\n+ }\n+\n+ void __attribute__((noinline, no_sanitize(\"memtag-stack\")))\n+ after_catch ()\n+ {\n+ char x[10000];\n+ hwasan_read(&x[0], sizeof(x));\n+ }\n+\n+ void __attribute__((noinline))\n+ test_tag (void)\n+ {\n+ try {\n+ foo ();\n+ } catch (...) {\n+ after_catch ();\n+ // If no tag mismatch then we can see this.\n+ return;\n+ }\n+ __builtin_abort ();\n+ }\n+}\n+\n+int\n+main (void)\n+{\n+ setHandler ();\n+ test_tag ();\n+ return 0;\n+}\ndiff --git a/libgcc/config/aarch64/linux-unwind.h b/libgcc/config/aarch64/linux-unwind.h\nindex 8fb782ab996..f34bf29dc3c 100644\n--- a/libgcc/config/aarch64/linux-unwind.h\n+++ b/libgcc/config/aarch64/linux-unwind.h\n@@ -29,6 +29,49 @@\n #include \n #include \n \n+#ifdef __ARM_FEATURE_MEMORY_TAGGING\n+/* Avoid runtime MTE detection if libgcc is built with MTE. */\n+# define HAVE_MTE_CONST const\n+# define HAVE_MTE_VALUE 1\n+#elif __gnu_linux__\n+/* MTE access detection on Linux. */\n+# define HAVE_MTE_CONST\n+# define HAVE_MTE_VALUE 0\n+\n+# define AT_HWCAP2\t26\n+# define HWCAP2_MTE\t(1 << 18)\n+# define HAVE_MTE_CTOR mte_accessible ()\n+unsigned long int __getauxval (unsigned long int);\n+\n+static _Bool\n+mte_accessible (void)\n+{\n+ unsigned long hwcap2 = __getauxval (AT_HWCAP2);\n+ return (hwcap2 & HWCAP2_MTE) != 0;\n+}\n+#else /* !__gnu_linux__ */\n+# define HAVE_MTE_CONST const\n+# define HAVE_MTE_VALUE 0\n+#endif /* __ARM_FEATURE_MEMORY_TAGGING */\n+\n+static HAVE_MTE_CONST _Bool __aarch64_have_mte = HAVE_MTE_VALUE;\n+\n+#ifdef HAVE_MTE_CTOR\n+/* Use a higher priority to ensure it runs before user constructors\n+ with priority 100. */\n+static void __attribute__((constructor (90)))\n+init_have_mte (void)\n+{\n+ __aarch64_have_mte = HAVE_MTE_CTOR;\n+}\n+#endif\n+\n+#define MEMTAG_GRANULE_SIZE 16\n+#define MEMTAG_GRANULE_BITSIZE 4\n+\n+#pragma GCC aarch64 \"arm_acle.h\"\n+#define MD_CLEAN_MEMTAG_RANGE aarch64_clean_memtag_range\n+\n /* Since insns are always stored LE, on a BE system the opcodes will\n be loaded byte-reversed. Therefore, define two sets of opcodes,\n one for LE and one for BE. */\n@@ -266,4 +309,29 @@ aarch64_fallback_frame_state (struct _Unwind_Context *context,\n return _URC_NO_REASON;\n }\n \n+static void __attribute__((target(\"arch=armv8.5-a+memtag\")))\n+aarch64_clean_memtag_range (void *old_cfa,\n+\t\t\t void *new_cfa)\n+{\n+ volatile unsigned char *sp = (unsigned char *) old_cfa;\n+ size_t size = new_cfa - old_cfa;\n+\n+ /* If the system doesn't have memory tag machinery or it is missing, just\n+ skip this function. */\n+ if (!__aarch64_have_mte)\n+ return;\n+\n+ /* Sanity check. */\n+ if (old_cfa > new_cfa)\n+ return;\n+\n+ /* Adjust the size accordingly to the MTE granule and clean all the tags. */\n+ size >>= MEMTAG_GRANULE_BITSIZE;\n+ for (size_t i = 0; i < size; i++)\n+ {\n+ __arm_mte_set_tag ((volatile void *) sp);\n+ sp += MEMTAG_GRANULE_SIZE;\n+ }\n+}\n+\n #endif\n","prefixes":["2/2"]}