{"id":2222477,"url":"http://patchwork.ozlabs.org/api/patches/2222477/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260412064701.357997-1-s-vadapalli@ti.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260412064701.357997-1-s-vadapalli@ti.com>","list_archive_url":null,"date":"2026-04-12T06:46:17","name":"doc: board: ti: j784s4_evm: Automate BAR address lookup for PCIe Boot","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"7166cc1aafddcf55bc00d9b9f4a3476a6bea1e6f","submitter":{"id":84157,"url":"http://patchwork.ozlabs.org/api/people/84157/?format=json","name":"Siddharth Vadapalli","email":"s-vadapalli@ti.com"},"delegate":{"id":68728,"url":"http://patchwork.ozlabs.org/api/users/68728/?format=json","username":"xypron","first_name":"Heinrich","last_name":"Schuchardt","email":"xypron.glpk@gmx.de"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260412064701.357997-1-s-vadapalli@ti.com/mbox/","series":[{"id":499586,"url":"http://patchwork.ozlabs.org/api/series/499586/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=499586","date":"2026-04-12T06:46:17","name":"doc: board: ti: j784s4_evm: Automate BAR address lookup for PCIe Boot","version":1,"mbox":"http://patchwork.ozlabs.org/series/499586/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222477/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222477/checks/","tags":{},"related":[],"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=selector1 header.b=EJxd1fxm;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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helo=lewvzet200.ext.ti.com; pr=C","From":"Siddharth Vadapalli <s-vadapalli@ti.com>","To":"<trini@konsulko.com>, <mkorpershoek@kernel.org>, <u-kumar1@ti.com>,\n <anshuld@ti.com>","CC":"<u-boot@lists.denx.de>, <srk@ti.com>, <s-vadapalli@ti.com>","Subject":"[PATCH] doc: board: ti: j784s4_evm: Automate BAR address lookup for\n PCIe Boot","Date":"Sun, 12 Apr 2026 12:16:17 +0530","Message-ID":"<20260412064701.357997-1-s-vadapalli@ti.com>","X-Mailer":"git-send-email 2.51.1","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-C2ProcessedOrg":"333ef613-75bf-4e12-a4b1-8e3623f5dcea","X-EOPAttributedMessage":"0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"DS1PEPF0001709D:EE_|IA6PR10MB997681:EE_","X-MS-Office365-Filtering-Correlation-Id":"45a80ca3-fba8-4f98-9e8a-08de985eff2e","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"BCL:0;\n ARA:13230040|376014|36860700016|82310400026|1800799024|18002099003|56012099003;","X-Microsoft-Antispam-Message-Info":"\n UODWfTxT9gvpx6zUpJ687Ss+TOXs62yei3sReJy/5WeZ5O5jJ1mxKjymxZQpgd6w0W/c6Qetf+VPI00UIA3uLIzAKE93QgkT9EC5R4bH7yuWiLE4dS8l7nrY4ROSNWWq5yEOOE7CBn1GfFSTD7hAaQJ04qiX+6JWmOwBZdRiGQi4Fib/XdQkguRIQ2/44jcgauvwtZvwniLkHBZFqvcO6vpvx0m3HACDFmYekaqKlQVeUHEnGvgJtrAhi4P3z9Lfx3BP2ym8Br/LiYZJEOAoDxb6NwaFuiKnZcNPjkwPVU/1VjuQG4RX22GRM8wp6+N7P8ox0d5NgGo8TSt1a1TxIuM3IDmKvz+c0zQoknzpVHN+Q1iDVq7kvmhJkp2KFiXHRIgfH7cWInxB1vrz0sEhuoGa2d94jACafRIDelLemc4clDkOu+yqfspBiSDUdUGcwEjbH0LdY6YqmbXyVKeVm6NU+f9vVziDZEwU+xkIuH8a1MMKJSSK6oafpgc5s10oXU+5xzM8KPlHKi0uKGF9jvZt8Pp3LH9NB2GKIRniFxwy85jvDndYlXFsUaqbwKY8yjasAYXYa6ggte6DaEyRbgXqVeXPsmPH0P7XMGiW+imzY9n1vY3hSxpE6GW5hGSBl752dMQw2aHW/k40Sm15PXAbbedNGCfp5vKRX0qBHrdaOnfXYXiYzJCSci8WXYGCYvYry8SCYJnDdhOpN+mORg==","X-Forefront-Antispam-Report":"CIP:198.47.23.194; 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Ip=[198.47.23.194];\n Helo=[lewvzet200.ext.ti.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n DS1PEPF0001709D.namprd05.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"IA6PR10MB997681","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<https://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"When the J784S4-EVM is configured for PCIe Boot, the Bootloaders are to\nbe written to the address specified by particular BARs. The existing\ndocumentation hard-codes the address corresponding to the BAR under the\nassumption that the Root-Complex transferring the Bootloaders is also\na J784S4-EVM. The Root-Complex assigns addresses to the BARs depending\non the currently available set of free system addresses. Since the free\nsystem addresses vary with the Root-Complex being used, instead of\nhard-coding the BARs, automate the process of identifying the appropriate\nBAR in the form of a command to be run by the user on the Root-Complex.\n\nSigned-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>\n---\n\nThis patch is based on commit\ne2fa3e570f8 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh\nof the master branch of U-Boot.\n\nPatch has been tested by running the following command to build the\ndocumentation:\nmake htmldocs\nfollowed by verifying that the update is reflected in the generated\ndocumentation with proper formatting.\n\nRegards,\nSiddharth.\n\n doc/board/ti/j784s4_evm.rst | 16 +++++++++-------\n 1 file changed, 9 insertions(+), 7 deletions(-)","diff":"diff --git a/doc/board/ti/j784s4_evm.rst b/doc/board/ti/j784s4_evm.rst\nindex fb767bedbf6..f89def076c2 100644\n--- a/doc/board/ti/j784s4_evm.rst\n+++ b/doc/board/ti/j784s4_evm.rst\n@@ -456,12 +456,12 @@ The following steps describe the process of booting J784S4-EVM over PCIe:\n       0000:01:00.1 Non-VGA unclassified device: Texas Instruments Device 0100\n       0000:01:00.2 Non-VGA unclassified device: Texas Instruments Device 0100\n \n-4. Copy ``tiboot3.bin`` to the endpoint. Use ``lspci -vv`` to identify the BAR\n-   address:\n+4. Copy ``tiboot3.bin`` to BAR1 of Physical Function Zero of the endpoint:\n \n    .. prompt:: bash\n \n-      sudo ./pcie_boot_util 0x4007100000 tiboot3.bin\n+      tiboot3_bar_address=\"0x$(lspci -D -nnvv | awk '/^[0-9a-fA-F]{4}:/ {bdf=$1; ram=($0 ~ /RAM memory/ || $0 ~ /Memory controller/)} ram && /Region [1]+:/ {print bdf, $0}' | cut -d ' ' -f 6)\"\n+      sudo ./pcie_boot_util ${tiboot3_bar_address} tiboot3.bin\n \n    The sample program automatically writes the image start address to\n    ``0x41CF3FE0`` and the magic word ``0xB17CEAD9`` to ``0x41CF3FE4``.\n@@ -491,11 +491,12 @@ The following steps describe the process of booting J784S4-EVM over PCIe:\n       (with appropriate DOMAIN:BUS:DEVICE.FUNCTION corresponding to the Endpoint) to enable\n       the BAR.\n \n-6. Copy ``tispl.bin`` to the new BAR address (use ``lspci -vv`` to find):\n+6. Copy ``tispl.bin`` to BAR0 of Physical Function Zero of the endpoint:\n \n    .. prompt:: bash\n \n-      sudo ./pcie_boot_util 0x4000400000 tispl.bin\n+      tispl_bar_address=\"0x$(lspci -D -nnvv | awk '/^[0-9a-fA-F]{4}:/ {bdf=$1; ram=($0 ~ /RAM memory/ || $0 ~ /Memory controller/)} ram && /Region [0]+:/ {print bdf, $0}' | head -n1 | cut -d ' ' -f 6)\"\n+      sudo ./pcie_boot_util ${tispl_bar_address} tispl.bin\n \n 7. After ``tispl.bin`` is processed, the PCIe link will go down again. Remove\n    and rescan the PCIe device:\n@@ -505,11 +506,12 @@ The following steps describe the process of booting J784S4-EVM over PCIe:\n       echo 1 > /sys/bus/pci/devices/0000\\:01\\:00.0/remove\n       echo 1 > /sys/bus/pci/devices/0000\\:00\\:00.0/rescan\n \n-8. Copy ``u-boot.img``:\n+8. Copy ``u-boot.img`` to BAR0 of Physical Function Zero of the endpoint:\n \n    .. prompt:: bash\n \n-      sudo ./pcie_boot_util 0x4000400000 u-boot.img\n+      uboot_bar_address=\"0x$(lspci -D -nnvv | awk '/^[0-9a-fA-F]{4}:/ {bdf=$1; ram=($0 ~ /RAM memory/ || $0 ~ /Memory controller/)} ram && /Region [0]+:/ {print bdf, $0}' | head -n1 | cut -d ' ' -f 6)\"\n+      sudo ./pcie_boot_util ${uboot_bar_address} u-boot.img\n \n 9. After ``u-boot.img`` is successfully loaded, the boot process is complete\n    and endpoint should boot till U-Boot prompt.\n","prefixes":[]}