{"id":2222426,"url":"http://patchwork.ozlabs.org/api/patches/2222426/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260411154535.1451361-1-vivien.leger@gmail.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260411154535.1451361-1-vivien.leger@gmail.com>","list_archive_url":null,"date":"2026-04-11T15:45:35","name":"hw/ppc/e500: fix bus-frequency property hardcoded to zero in CPU FDT node","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"75de1be57b615814b53161dfefc9f366414896a1","submitter":{"id":93121,"url":"http://patchwork.ozlabs.org/api/people/93121/?format=json","name":"Vivien LEGER","email":"vivien.leger@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260411154535.1451361-1-vivien.leger@gmail.com/mbox/","series":[{"id":499563,"url":"http://patchwork.ozlabs.org/api/series/499563/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499563","date":"2026-04-11T15:45:35","name":"hw/ppc/e500: fix bus-frequency property hardcoded to zero in CPU FDT node","version":1,"mbox":"http://patchwork.ozlabs.org/series/499563/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222426/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222426/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=OT6Mt8H3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4ftJ9s4j2Xz1y2d\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 12 Apr 2026 01:53:35 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wBadc-0007IJ-4D; Sat, 11 Apr 2026 11:52:48 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <vivien.leger@gmail.com>)\n id 1wBaWq-0005HZ-UI\n for qemu-devel@nongnu.org; Sat, 11 Apr 2026 11:45:59 -0400","from mail-wm1-x334.google.com ([2a00:1450:4864:20::334])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <vivien.leger@gmail.com>)\n id 1wBaWk-0001CS-Ik\n for qemu-devel@nongnu.org; Sat, 11 Apr 2026 11:45:48 -0400","by mail-wm1-x334.google.com with SMTP id\n 5b1f17b1804b1-488b8bc6bc9so21335425e9.3\n for <qemu-devel@nongnu.org>; Sat, 11 Apr 2026 08:45:40 -0700 (PDT)","from vle-arch (88-184-113-142.subs.proxad.net. [88.184.113.142])\n by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-488d6839981sm48974135e9.21.2026.04.11.08.45.37\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Sat, 11 Apr 2026 08:45:37 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1775922339; x=1776527139; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n :to:from:from:to:cc:subject:date:message-id:reply-to;\n bh=U/uR6qw258G23PmDbEC6+qEwH1s4sVRz5k7AU31IC0I=;\n b=OT6Mt8H3Ww9v07pGnq748gdGW6A/2vPLFXylVAqChU5B2kVKFnueZ3IIEHsrm7QfAM\n E9UzHVB/04BJauE7xLZU6nKBpMF7mytponJOzxwodRE7rq1uykzUXjo5iDIwFIv31tZk\n JK84+/85BF9F1YMPDGDwoVSz7EhXYbHpycZmMgTaEwQ9fK4aKZbgQ5CMRKhbY+l6zQAh\n tvI+/SY7yA1NcqoYENjF4jomKIQFJGAlHRrOs83YeUObrq/n/n3Fy0l+v7H/VYoBBQBa\n wMg+mJl2Qa6GiLIB0jaS6Si5IfDHX28+uG8XzGbXxww28lvKz2iUlWuYeR+1oCuefD9i\n fJPg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1775922339; x=1776527139;\n h=content-transfer-encoding:mime-version:message-id:date:subject:cc\n :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date\n :message-id:reply-to;\n bh=U/uR6qw258G23PmDbEC6+qEwH1s4sVRz5k7AU31IC0I=;\n b=R4YAvQx4pSIVQfPiXdoTEkZWfZ5PFKGV5iqgcw5fiGCch3lnj5VxKCoKC/TcU/eIZC\n G5uJwn4AEGF54PRz9cqhKTKWQ2GSwsjYHygrHVXQ9AWfdxWQbdJbuHFg0940YBGrQegd\n yQofLQsvmzJlNNuv/HvOxFsM7sUH7BmBjnhA9Wn4z/+83hKTz20TYxWqxZSTJRPRNCqj\n P4Ap5+rbYZwLMeYYoIUt65QdcVmm124ve3c5yxdr512N00njfNGLKoX32qjFBd8TIpI7\n /Gg2OYDDiKH/SaMY1/JmQWrRCXhkRDT4U8WZDoN90QgN9aupp1KxK7qIU1n62AcUJ2bM\n Iusg==","X-Forwarded-Encrypted":"i=1;\n AJvYcCUobfk1AhTkbpxJWXjVUELyrXUuXmRUPH/8sY8Jz1SrADTQU09PeVAnRd1d6bdP5MkGT5ddkxdosZN6@nongnu.org","X-Gm-Message-State":"AOJu0YyknMLKjyY3kcT8/jTaggyP+YeMsLHZdqpyo2CeybIwBeZUq5x7\n 5sDOmtwibuc7UgYFSRraAr0rttUADknftd+BteCY1DDf2RUNLVBAjVDX","X-Gm-Gg":"AeBDiet72OlnOFRGpePdGPeIfWL9o3n0VQHGAx249Kyp/UPwhcxk35bVUXejrHDKAmR\n KVPYxWLyhIT0NLpjQ4UZCKWpk7zUjGHjVr1z3je8B9qIqFEOiRTKu7jYKo5lkQ1pgtPFtT/h/DR\n aYPJ2avIBuISOV2+LElLJnMRttjqGqZxSKQBqVbUBYnhU8ccbowpJM8BXl0V4e6wTQQQ7w+DWSd\n +pCeHYzlKA3KGFZGHVcOWtbOmVlqNabQ7py9kiTn7lodY5bltkCxkXJCqpIcZE+KQMC3yprR+B6\n qoMiiJos//tjBRh2bsqqyHhz7qr1pPDFCWSLOExxIprcnD6naAZmOhaJZQk5PzIS62DeVEwHrpF\n xMJY3l38wvWc0V5LDnIfDq/RoHC/rMYm4hRGjU9vZwcNMr2pj+h4fqkkVrWokkBBecp67aMd9Zw\n duD3q+RMUp8pxWhOGp1pOcp01k+1p6Rur46FxFxbUjdkEiNKTTssTSh5WGOG190jB+JqAVAHa7Z\n ypsyzw89TUkwg1qOrkCMA1de5PBk5hlBpyF5+g=","X-Received":"by 2002:a05:600c:8591:b0:488:a824:fe04 with SMTP id\n 5b1f17b1804b1-488d6abe9e4mr68536955e9.26.1775922338396;\n Sat, 11 Apr 2026 08:45:38 -0700 (PDT)","From":"Vivien LEGER <vivien.leger@gmail.com>","To":"qemu-ppc@nongnu.org","Cc":"shentey@gmail.com, qemu-devel@nongnu.org,\n Vivien LEGER <vivien.leger@gmail.com>","Subject":"[PATCH] hw/ppc/e500: fix bus-frequency property hardcoded to zero in\n CPU FDT node","Date":"Sat, 11 Apr 2026 17:45:35 +0200","Message-ID":"<20260411154535.1451361-1-vivien.leger@gmail.com>","X-Mailer":"git-send-email 2.53.0","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::334;\n envelope-from=vivien.leger@gmail.com; helo=mail-wm1-x334.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Sat, 11 Apr 2026 11:52:46 -0400","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"The bus-frequency property in the CPU FDT node was hardcoded to 0.\nThis is incorrect - it should reflect the actual platform bus clock\nfrequency, as firmware and RTOSes use it to derive peripheral clock\nrates.\n\nNotably, the RTEMS QorIQ BSP uses bus-frequency to program the MPIC\nglobal timer interval. With bus-frequency=0, the timer interval\noverflows to ~85 seconds, preventing any clock interrupts from firing.\n\nFix by adding a bus_freq field to PPCE500MachineClass and using it in\nthe FDT generator. Set bus_freq = PLATFORM_CLK_FREQ_HZ (400MHz) for\nexisting machines, matching the existing clock_freq value.\n\nSigned-off-by: Vivien LEGER <vivien.leger@gmail.com>\n---\n hw/ppc/e500.c      | 2 +-\n hw/ppc/e500.h      | 1 +\n hw/ppc/e500plat.c  | 1 +\n hw/ppc/mpc8544ds.c | 1 +\n 4 files changed, 4 insertions(+), 1 deletion(-)","diff":"diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c\nindex d6ca2e8..5be2f20 100644\n--- a/hw/ppc/e500.c\n+++ b/hw/ppc/e500.c\n@@ -518,7 +518,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,\n                               env->icache_line_size);\n         qemu_fdt_setprop_cell(fdt, cpu_name, \"d-cache-size\", 0x8000);\n         qemu_fdt_setprop_cell(fdt, cpu_name, \"i-cache-size\", 0x8000);\n-        qemu_fdt_setprop_cell(fdt, cpu_name, \"bus-frequency\", 0);\n+        qemu_fdt_setprop_cell(fdt, cpu_name, \"bus-frequency\", pmc->bus_freq);\n         if (cpu->cpu_index) {\n             qemu_fdt_setprop_string(fdt, cpu_name, \"status\", \"disabled\");\n             qemu_fdt_setprop_string(fdt, cpu_name, \"enable-method\",\ndiff --git a/hw/ppc/e500.h b/hw/ppc/e500.h\nindex 11f8ae5..6d56c7b 100644\n--- a/hw/ppc/e500.h\n+++ b/hw/ppc/e500.h\n@@ -40,6 +40,7 @@ struct PPCE500MachineClass {\n     hwaddr pci_mmio_bus_base;\n     hwaddr spin_base;\n     uint32_t clock_freq;\n+    uint32_t bus_freq;\n     uint32_t tb_freq;\n };\n \ndiff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c\nindex ca56472..85cec81 100644\n--- a/hw/ppc/e500plat.c\n+++ b/hw/ppc/e500plat.c\n@@ -94,6 +94,7 @@ static void e500plat_machine_class_init(ObjectClass *oc, const void *data)\n     pmc->pci_mmio_bus_base = 0xE0000000ULL;\n     pmc->spin_base = 0xFEF000000ULL;\n     pmc->clock_freq = PLATFORM_CLK_FREQ_HZ;\n+    pmc->bus_freq = PLATFORM_CLK_FREQ_HZ;\n     pmc->tb_freq = PLATFORM_CLK_FREQ_HZ;\n \n     mc->desc = \"generic paravirt e500 platform\";\ndiff --git a/hw/ppc/mpc8544ds.c b/hw/ppc/mpc8544ds.c\nindex 5826985..d022761 100644\n--- a/hw/ppc/mpc8544ds.c\n+++ b/hw/ppc/mpc8544ds.c\n@@ -56,6 +56,7 @@ static void mpc8544ds_machine_class_init(ObjectClass *oc, const void *data)\n     pmc->pci_pio_base = 0xE1000000ULL;\n     pmc->spin_base = 0xEF000000ULL;\n     pmc->clock_freq = PLATFORM_CLK_FREQ_HZ;\n+    pmc->bus_freq = PLATFORM_CLK_FREQ_HZ;\n     pmc->tb_freq = PLATFORM_CLK_FREQ_HZ;\n \n     mc->desc = \"mpc8544ds\";\n","prefixes":[]}