{"id":2222195,"url":"http://patchwork.ozlabs.org/api/patches/2222195/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260410200031.18572-3-philmd@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260410200031.18572-3-philmd@linaro.org>","list_archive_url":null,"date":"2026-04-10T20:00:31","name":"[v2,2/2] hw/arm/smmuv3: Avoid including CONFIG_DEVICES in hw/ header","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"13693075255ee99b9dd7b54f5817383cc300913b","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260410200031.18572-3-philmd@linaro.org/mbox/","series":[{"id":499500,"url":"http://patchwork.ozlabs.org/api/series/499500/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499500","date":"2026-04-10T20:00:29","name":"hw/arm/smmuv3: Avoid including CONFIG_DEVICES in hw/ header","version":2,"mbox":"http://patchwork.ozlabs.org/series/499500/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222195/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222195/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google 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(PDT)","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","To":"qemu-devel@nongnu.org","Cc":"Nathan Chen , qemu-arm@nongnu.org,\n Peter Maydell ,\n Shameer Kolothum Thodi ,\n Eric Auger ,\n =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ,\n Thomas Huth ","Subject":"[PATCH v2 2/2] hw/arm/smmuv3: Avoid including CONFIG_DEVICES in hw/\n header","Date":"Fri, 10 Apr 2026 22:00:31 +0200","Message-ID":"<20260410200031.18572-3-philmd@linaro.org>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260410200031.18572-1-philmd@linaro.org>","References":"<20260410200031.18572-1-philmd@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32c;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"By turning the inline functions into stubs we can avoid the\nuse of target-specific CONFIG_DEVICES include in a hw/ header,\nallowing to build the source files including it as common objects.\n\nSigned-off-by: Philippe Mathieu-Daudé \nReviewed-by: Thomas Huth \n---\n hw/arm/smmuv3-accel.h | 42 ------------------------------\n hw/arm/smmuv3-accel-stubs.c | 52 +++++++++++++++++++++++++++++++++++++\n hw/arm/meson.build | 5 ++--\n 3 files changed, 55 insertions(+), 44 deletions(-)\n create mode 100644 hw/arm/smmuv3-accel-stubs.c","diff":"diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h\nindex 1ca2c80a933..85669d0e00e 100644\n--- a/hw/arm/smmuv3-accel.h\n+++ b/hw/arm/smmuv3-accel.h\n@@ -14,7 +14,6 @@\n #ifdef CONFIG_LINUX\n #include \n #endif\n-#include CONFIG_DEVICES\n \n /*\n * Represents an accelerated SMMU instance backed by an iommufd vIOMMU object.\n@@ -41,7 +40,6 @@ typedef struct SMMUv3AccelDevice {\n SMMUv3AccelState *s_accel;\n } SMMUv3AccelDevice;\n \n-#ifdef CONFIG_ARM_SMMUV3_ACCEL\n bool smmuv3_accel_init(SMMUv3State *s, Error **errp);\n bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,\n Error **errp);\n@@ -53,45 +51,5 @@ bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,\n void smmuv3_accel_idr_override(SMMUv3State *s);\n bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp);\n void smmuv3_accel_reset(SMMUv3State *s);\n-#else\n-#include \"qapi/error.h\"\n-static inline bool smmuv3_accel_init(SMMUv3State *s, Error **errp)\n-{\n- error_setg(errp, \"accel=on support not compiled in\");\n- return false;\n-}\n-static inline bool\n-smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,\n- Error **errp)\n-{\n- return true;\n-}\n-static inline bool\n-smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range,\n- Error **errp)\n-{\n- return true;\n-}\n-static inline bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp)\n-{\n- return true;\n-}\n-static inline bool\n-smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,\n- Error **errp)\n-{\n- return true;\n-}\n-static inline void smmuv3_accel_idr_override(SMMUv3State *s)\n-{\n-}\n-static inline bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp)\n-{\n- return true;\n-}\n-static inline void smmuv3_accel_reset(SMMUv3State *s)\n-{\n-}\n-#endif\n \n #endif /* HW_ARM_SMMUV3_ACCEL_H */\ndiff --git a/hw/arm/smmuv3-accel-stubs.c b/hw/arm/smmuv3-accel-stubs.c\nnew file mode 100644\nindex 00000000000..70cef66966a\n--- /dev/null\n+++ b/hw/arm/smmuv3-accel-stubs.c\n@@ -0,0 +1,52 @@\n+/*\n+ * Stubs for accelerated SMMU instance backed by an iommufd vIOMMU object.\n+ *\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+\n+#include \"qemu/osdep.h\"\n+#include \"qapi/error.h\"\n+#include \"hw/arm/smmuv3.h\"\n+#include \"hw/arm/smmuv3-accel.h\"\n+\n+bool smmuv3_accel_init(SMMUv3State *s, Error **errp)\n+{\n+ error_setg(errp, \"accel=on support not compiled in\");\n+ return false;\n+}\n+\n+bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,\n+ Error **errp)\n+{\n+ return true;\n+}\n+\n+bool smmuv3_accel_install_ste_range(SMMUv3State *s, SMMUSIDRange *range,\n+ Error **errp)\n+{\n+ return true;\n+}\n+\n+bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp)\n+{\n+ return true;\n+}\n+\n+bool smmuv3_accel_issue_inv_cmd(SMMUv3State *s, void *cmd, SMMUDevice *sdev,\n+ Error **errp)\n+{\n+ return true;\n+}\n+\n+void smmuv3_accel_idr_override(SMMUv3State *s)\n+{\n+}\n+\n+bool smmuv3_accel_alloc_veventq(SMMUv3State *s, Error **errp)\n+{\n+ return true;\n+}\n+\n+void smmuv3_accel_reset(SMMUv3State *s)\n+{\n+}\ndiff --git a/hw/arm/meson.build b/hw/arm/meson.build\nindex b187b946f04..3be1252c4f1 100644\n--- a/hw/arm/meson.build\n+++ b/hw/arm/meson.build\n@@ -84,8 +84,9 @@ arm_common_ss.add(when: 'CONFIG_ARMSSE', if_true: files('armsse.c'))\n arm_common_ss.add(when: 'CONFIG_FSL_IMX7', if_true: files('fsl-imx7.c', 'mcimx7d-sabre.c'))\n arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP', if_true: files('fsl-imx8mp.c'))\n arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: files('imx8mp-evk.c'))\n-arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))\n-arm_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c'))\n+arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c'))\n+arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3_ACCEL', if_true: files('smmuv3-accel.c'))\n+stub_ss.add(files('smmuv3-accel-stubs.c'))\n arm_common_ss.add(when: 'CONFIG_FSL_IMX6UL', if_true: files('fsl-imx6ul.c', 'mcimx6ul-evk.c'))\n arm_common_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))\n arm_common_ss.add(when: 'CONFIG_XEN', if_true: files(\n","prefixes":["v2","2/2"]}