{"id":2220110,"url":"http://patchwork.ozlabs.org/api/patches/2220110/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260406105613.1228673-4-18255117159@163.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260406105613.1228673-4-18255117159@163.com>","list_archive_url":null,"date":"2026-04-06T10:56:13","name":"[v6,3/3] PCI: dwc: Use common speed conversion function","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"7ac78a6a2515d7fcd2830df437d0b3a5c6ef81fb","submitter":{"id":89937,"url":"http://patchwork.ozlabs.org/api/people/89937/?format=json","name":"Hans Zhang","email":"18255117159@163.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260406105613.1228673-4-18255117159@163.com/mbox/","series":[{"id":498843,"url":"http://patchwork.ozlabs.org/api/series/498843/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=498843","date":"2026-04-06T10:56:11","name":"PCI: Refactor PCIe speed validation and conversion functions","version":6,"mbox":"http://patchwork.ozlabs.org/series/498843/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220110/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220110/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-pci+bounces-51949-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=163.com header.i=@163.com header.a=rsa-sha256\n header.s=s110527 header.b=Jwd5zyCW;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; helo=sin.lore.kernel.org;\n envelope-from=linux-pci+bounces-51949-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=163.com header.i=@163.com\n header.b=\"Jwd5zyCW\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=220.197.31.3","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=163.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=163.com"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org [104.64.211.4])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fq5qy3jWHz1yFt\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 06 Apr 2026 20:57:02 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id 36F1B3004053\n\tfor <incoming@patchwork.ozlabs.org>; Mon,  6 Apr 2026 10:56:59 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 1234D328B7B;\n\tMon,  6 Apr 2026 10:56:57 +0000 (UTC)","from m16.mail.163.com (m16.mail.163.com [220.197.31.3])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A834208D0;\n\tMon,  6 Apr 2026 10:56:54 +0000 (UTC)","from Precision-7960.. (unknown [])\n\tby gzga-smtp-mtada-g1-4 (Coremail) with SMTP id\n _____wC37wJQkdNpmdyZDg--.25057S5;\n\tMon, 06 Apr 2026 18:56:19 +0800 (CST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775473017; cv=none;\n b=m2bpLBW3+AS7U0jFdvUOmNRMpHUpgcjC9CT1cHpiYH83BFzDEChnEPYR3KiuEGTmdWggmZ1x4HuADpGqDtrptzaTMtelY9qcYqQll7USMufKBAS/559jHCKnrT6ywPkXPj96VvPbHTNUBsc7+FcTXO9lO/E6bWrs8ESllPKJ9j0=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775473017; c=relaxed/simple;\n\tbh=Z8kylnjFJ+aJpwBQxW1tMwh37HUGbkbLY43b/JiLq7s=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t MIME-Version;\n b=auei8xkuVqofxm34xfYy6w7fbjyPITjgpCHLgEkJFU/0cpZ6EkQs3Vlh57xO9qt/Vw8J6/nJSXh9v3SCcZQH90h1mNZ1jM3mUpXIXcmun0y2EbYvxRWebO0xhIah4tP9FY60PP2zTVbOLjYlGwxtUTr1Nlo3T3fNrqgXzLqSZzw=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=163.com;\n spf=pass smtp.mailfrom=163.com;\n dkim=pass (1024-bit key) header.d=163.com header.i=@163.com\n header.b=Jwd5zyCW; arc=none smtp.client-ip=220.197.31.3","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com;\n\ts=s110527; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=Xy\n\tQ+1ZInts2Kj8sOfqMzvAw8MSBQMrsqKvKzGRjW+Vs=; b=Jwd5zyCWHJPEY8akZ/\n\tNIbuNUeBSN1J6JX6oL5K7tBTLbAJXm1da5nEaMWh6pLoyBNsccjG/mZQB5OELknJ\n\tJicSvoarXdBY2Bur5PSCeHxtFfd/QaM5FXJvdwP0igY3mkDGK74U7rmZfz9aBA+u\n\tEUFTYukHPScItdAi6q7y6ZfQk=","From":"Hans Zhang <18255117159@163.com>","To":"bhelgaas@google.com,\n\tlpieralisi@kernel.org,\n\tkw@linux.com,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tilpo.jarvinen@linux.intel.com,\n\tjingoohan1@gmail.com","Cc":"robh@kernel.org,\n\tlinux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tHans Zhang <18255117159@163.com>","Subject":"[PATCH v6 3/3] PCI: dwc: Use common speed conversion function","Date":"Mon,  6 Apr 2026 18:56:13 +0800","Message-Id":"<20260406105613.1228673-4-18255117159@163.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260406105613.1228673-1-18255117159@163.com>","References":"<20260406105613.1228673-1-18255117159@163.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"<linux-pci.vger.kernel.org>","List-Subscribe":"<mailto:linux-pci+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pci+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-CM-TRANSID":"_____wC37wJQkdNpmdyZDg--.25057S5","X-Coremail-Antispam":"1Uf129KBjvJXoW7uFWDZFy3tr4UWF4DXw1kKrg_yoW8AFW3pa\n\ty3AF4xZF18JF43uFs0ga4kXFyUXFnxGrWDCFZ8WasaqFy2yFZxWF10y34ft34akrZ2yr1a\n\t9w13JrWUG3W7tF7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2\n\t9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0zRnYFtUUUUU=","X-CM-SenderInfo":"rpryjkyvrrlimvzbiqqrwthudrp/xtbCwxPHa2nTkVPzeQAA3O"},"content":"Replace the private switch-based speed conversion in\ndw_pcie_link_set_max_speed() with the public pci_bus_speed2lnkctl2()\nfunction.\n\nThis eliminates duplicate conversion logic and ensures consistency with\nother PCIe drivers, while handling invalid speeds by falling back to\nhardware capabilities.\n\nSigned-off-by: Hans Zhang <18255117159@163.com>\nAcked-by: Manivannan Sadhasivam <mani@kernel.org>\n---\n drivers/pci/controller/dwc/pcie-designware.c | 18 +++---------------\n 1 file changed, 3 insertions(+), 15 deletions(-)","diff":"diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c\nindex 06792ba92aa7..ab8dee5d6c7a 100644\n--- a/drivers/pci/controller/dwc/pcie-designware.c\n+++ b/drivers/pci/controller/dwc/pcie-designware.c\n@@ -861,24 +861,12 @@ static void dw_pcie_link_set_max_speed(struct dw_pcie *pci)\n \tctrl2 = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCTL2);\n \tctrl2 &= ~PCI_EXP_LNKCTL2_TLS;\n \n-\tswitch (pcie_get_link_speed(pci->max_link_speed)) {\n-\tcase PCIE_SPEED_2_5GT:\n-\t\tlink_speed = PCI_EXP_LNKCTL2_TLS_2_5GT;\n-\t\tbreak;\n-\tcase PCIE_SPEED_5_0GT:\n-\t\tlink_speed = PCI_EXP_LNKCTL2_TLS_5_0GT;\n-\t\tbreak;\n-\tcase PCIE_SPEED_8_0GT:\n-\t\tlink_speed = PCI_EXP_LNKCTL2_TLS_8_0GT;\n-\t\tbreak;\n-\tcase PCIE_SPEED_16_0GT:\n-\t\tlink_speed = PCI_EXP_LNKCTL2_TLS_16_0GT;\n-\t\tbreak;\n-\tdefault:\n+\tlink_speed = pcie_get_link_speed(pci->max_link_speed);\n+\tlink_speed = pci_bus_speed2lnkctl2(link_speed);\n+\tif (link_speed == 0) {\n \t\t/* Use hardware capability */\n \t\tlink_speed = FIELD_GET(PCI_EXP_LNKCAP_SLS, cap);\n \t\tctrl2 &= ~PCI_EXP_LNKCTL2_HASD;\n-\t\tbreak;\n \t}\n \n \tdw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCTL2, ctrl2 | link_speed);\n","prefixes":["v6","3/3"]}