{"id":2220092,"url":"http://patchwork.ozlabs.org/api/patches/2220092/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260406103237.1203127-2-18255117159@163.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260406103237.1203127-2-18255117159@163.com>","list_archive_url":null,"date":"2026-04-06T10:32:36","name":"[v3,1/2] PCI: cadence: Add HPA architecture flag","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"0685f894f3f1de82601d8c3a05fee628ae730307","submitter":{"id":89937,"url":"http://patchwork.ozlabs.org/api/people/89937/?format=json","name":"Hans Zhang","email":"18255117159@163.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260406103237.1203127-2-18255117159@163.com/mbox/","series":[{"id":498837,"url":"http://patchwork.ozlabs.org/api/series/498837/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=498837","date":"2026-04-06T10:32:36","name":"PCI: cadence: Add LTSSM debugfs","version":3,"mbox":"http://patchwork.ozlabs.org/series/498837/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220092/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220092/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-pci+bounces-51940-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=163.com header.i=@163.com header.a=rsa-sha256\n header.s=s110527 header.b=Ik3kLUBG;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-51940-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=163.com header.i=@163.com\n header.b=\"Ik3kLUBG\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=220.197.31.3","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=163.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=163.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fq5Jp3MBQz1xy1\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 06 Apr 2026 20:33:30 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 158943011C78\n\tfor <incoming@patchwork.ozlabs.org>; Mon,  6 Apr 2026 10:33:22 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id E863B324718;\n\tMon,  6 Apr 2026 10:33:18 +0000 (UTC)","from m16.mail.163.com (m16.mail.163.com [220.197.31.3])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 492643242D8;\n\tMon,  6 Apr 2026 10:33:14 +0000 (UTC)","from Precision-7960.. (unknown [])\n\tby gzga-smtp-mtada-g0-4 (Coremail) with SMTP id\n _____wAHyuPNi9NplrBRDg--.19284S3;\n\tMon, 06 Apr 2026 18:32:48 +0800 (CST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775471598; cv=none;\n b=Ies7tOQ4bAHPcoSzPSNs6MdWF1Pf6N38bRjQ4gDPFHOLrQaGvI5AMJz6CA0aaI05AgFFUDUP10Rc2NGxtylCRtQSuss1tFCTj/gvGBiBrWU8XgICd5IlMXlC+cmPkJ6b36kxBipnR3XLejv6iGSlrkWVwTHT133n7zo0yvTQINI=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775471598; c=relaxed/simple;\n\tbh=U8J5dv04gSYQLhhjyE9LuRjWjUBrhEl3vTCzZns/+9g=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t MIME-Version;\n b=CqpDD9NPKPfIoyQlmCovC7tQHDIM9aVjaIfp8TtbBKEDjkyTJ0jioUQJ/Zw9mVFxpftlOhz2b+3IUK5RhSatyZfww5ojgSpPdw16MlT+K85kbVdjvb4I5TYD5ltjPnT4NX7Z3wjiekLoXt37fBdWAD6lTROxX2LP3sCIlZ29eUs=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=163.com;\n spf=pass smtp.mailfrom=163.com;\n dkim=pass (1024-bit key) header.d=163.com header.i=@163.com\n header.b=Ik3kLUBG; arc=none smtp.client-ip=220.197.31.3","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com;\n\ts=s110527; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=ZK\n\t5NXyv8bHcbO9IcoNERQ8LpDwZtc23GgSikLhcub9M=; b=Ik3kLUBGZdGyaWrU6i\n\t1LJT9dUQz/Tv1HcssSOrm95Ow1D9tKvxt6zmTutoF0sYn6di+Qx+vpa6v48CcJj0\n\tVIsO627Euscn6nSWdvQY9sD3sMIGX/y8PiEPzw6Qd9vwLRqvoprBL9/G0Q3iJe4W\n\tf63q7i+4D+3oP4lti62Xm1FN4=","From":"Hans Zhang <18255117159@163.com>","To":"bhelgaas@google.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\thans.zhang@cixtech.com","Cc":"robh@kernel.org,\n\tmpillai@cadence.com,\n\tlinux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tHans Zhang <18255117159@163.com>","Subject":"[PATCH v3 1/2] PCI: cadence: Add HPA architecture flag","Date":"Mon,  6 Apr 2026 18:32:36 +0800","Message-Id":"<20260406103237.1203127-2-18255117159@163.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260406103237.1203127-1-18255117159@163.com>","References":"<20260406103237.1203127-1-18255117159@163.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"<linux-pci.vger.kernel.org>","List-Subscribe":"<mailto:linux-pci+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pci+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-CM-TRANSID":"_____wAHyuPNi9NplrBRDg--.19284S3","X-Coremail-Antispam":"1Uf129KBjvJXoW7AFy3ArWfuw4Dtr4kXr4UXFb_yoW8Zr13pa\n\tyDGFySk3WfXF45uan5Z3W5Cr1avFnxZasrKws09w1fCF13CrWUGFy7WFyrJF9xKrW7ur1x\n\tZF1DtasrJFsIyrUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2\n\t9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0pR0Ap5UUUUU=","X-CM-SenderInfo":"rpryjkyvrrlimvzbiqqrwthudrp/xtbCxBBmCmnTi9CITwAA3e"},"content":"Add a boolean flag 'is_hpa' to the cdns_pcie structure to indicate\nthat the controller is part of a Heterogeneous Processor Architecture\n(HPA) system. This flag will be used by subsequent patches to handle\nHPA-specific register layouts and behaviors.\n\nSigned-off-by: Hans Zhang <18255117159@163.com>\n---\n drivers/pci/controller/cadence/pci-sky1.c     | 1 +\n drivers/pci/controller/cadence/pcie-cadence.h | 2 ++\n 2 files changed, 3 insertions(+)","diff":"diff --git a/drivers/pci/controller/cadence/pci-sky1.c b/drivers/pci/controller/cadence/pci-sky1.c\nindex cd55c64e58a9..e1f4a98e2ab6 100644\n--- a/drivers/pci/controller/cadence/pci-sky1.c\n+++ b/drivers/pci/controller/cadence/pci-sky1.c\n@@ -174,6 +174,7 @@ static int sky1_pcie_probe(struct platform_device *pdev)\n \tcdns_pcie->reg_base = pcie->reg_base;\n \tcdns_pcie->msg_res = pcie->msg_res;\n \tcdns_pcie->is_rc = true;\n+\tcdns_pcie->is_hpa = true;\n \n \treg_off = devm_kzalloc(dev, sizeof(*reg_off), GFP_KERNEL);\n \tif (!reg_off) {\ndiff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h\nindex 443033c607d7..c8cb19f7622f 100644\n--- a/drivers/pci/controller/cadence/pcie-cadence.h\n+++ b/drivers/pci/controller/cadence/pcie-cadence.h\n@@ -80,6 +80,7 @@ struct cdns_plat_pcie_of_data {\n  * @msg_res: Region for send message to map PCI accesses\n  * @dev: PCIe controller\n  * @is_rc: tell whether the PCIe controller mode is Root Complex or Endpoint.\n+ * @is_hpa: indicates if the architecture is HPA\n  * @phy_count: number of supported PHY devices\n  * @phy: list of pointers to specific PHY control blocks\n  * @link: list of pointers to corresponding device link representations\n@@ -93,6 +94,7 @@ struct cdns_pcie {\n \tstruct resource                      *msg_res;\n \tstruct device\t\t             *dev;\n \tbool\t\t\t             is_rc;\n+\tbool\t\t\t\t     is_hpa;\n \tint\t\t\t             phy_count;\n \tstruct phy\t\t             **phy;\n \tstruct device_link\t             **link;\n","prefixes":["v3","1/2"]}