{"id":2219923,"url":"http://patchwork.ozlabs.org/api/patches/2219923/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260404183547.46509-2-marex@nabladev.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<20260404183547.46509-2-marex@nabladev.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/20260404183547.46509-2-marex@nabladev.com/","date":"2026-04-04T18:35:01","name":"[v2,2/2] ASoC: fsl_sai: Add RX/TX BCLK swap support","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"7023ad670f0f84d743b70ac6bdec06ad18cdc34c","submitter":{"id":91452,"url":"http://patchwork.ozlabs.org/api/people/91452/?format=json","name":"Marek Vasut","email":"marex@nabladev.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260404183547.46509-2-marex@nabladev.com/mbox/","series":[{"id":498782,"url":"http://patchwork.ozlabs.org/api/series/498782/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=498782","date":"2026-04-04T18:35:01","name":"[v2,1/2] ASoC: dt-bindings: fsl-sai: Document RX/TX BCLK swap support","version":2,"mbox":"http://patchwork.ozlabs.org/series/498782/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2219923/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219923/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nabladev.com header.i=@nabladev.com header.a=rsa-sha256\n header.s=dkim header.b=ViRbAUtR;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; helo=lists.ozlabs.org;\n envelope-from=linuxppc-dev+bounces-19328-incoming=patchwork.ozlabs.org@lists.ozlabs.org;\n receiver=patchwork.ozlabs.org)","lists.ozlabs.org;\n arc=none smtp.remote-ip=178.251.229.89","lists.ozlabs.org;\n dmarc=pass (p=reject dis=none) header.from=nabladev.com","lists.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nabladev.com header.i=@nabladev.com header.a=rsa-sha256\n header.s=dkim header.b=ViRbAUtR;\n\tdkim-atps=neutral","lists.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nabladev.com\n (client-ip=178.251.229.89; helo=mx.nabladev.com;\n envelope-from=marex@nabladev.com; receiver=lists.ozlabs.org)"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1 raw public key)\n server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fpXLf5fl2z1y2d\n\tfor ; Sun, 05 Apr 2026 22:48:09 +1000 (AEST)","from boromir.ozlabs.org (localhost [127.0.0.1])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 4fpXLb6Cf5z2yjs;\n\tSun, 05 Apr 2026 22:48:07 +1000 (AEST)","from mx.nabladev.com (mx.nabladev.com [178.251.229.89])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 4fp4KP6qdqz2xYw\n\tfor ; Sun, 05 Apr 2026 04:45:29 +1000 (AEST)","from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon)\n with ESMTPSA id 5EF60113200;\n\tSat, 4 Apr 2026 20:35:56 +0200 (CEST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1775328332;\n\tcv=none;\n b=D+D6ddxhHuSO6bMSK5Ti3gZDZMDZtR0iE5L0hbRpQjia9MOh1kc7ztC3peM613XzV5j/KBKbFlX6EgBVXg4iJghYn1JGeE3PCtfb7NcgGib0UpoZq7Fh0mISQeOhmKNijQgcfSTDTUKXUg4B49603RxM2ke1VAtMu5vYxus3dQvAeqvR+rE3LlaidAD9cBKBQa68iA0MQBJMBKWIuzmJxigr1SssyiJPmyqd61Tezq5S4vKSoeb7ubGk6GkdxVEpnr83mnsBtE97QHKe0UZqJAYNkVptcGS/BqhRWhwVag4Pb94uCm0zAvZFOSyVIgaQv60OGqeRavt09tZOVLdLVA==","ARC-Message-Signature":"i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707;\n\tt=1775328332; c=relaxed/relaxed;\n\tbh=NSBm8CQ9KV1sZc8xqRJrGb0nqJcw/MhMvwITjTm4MlU=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=Wdv7nLrLUfYeZf/AuBR/QizhJsVadsoTjDd/Z3qDsyIsORsXtONrcl/fbv/hUXfPaxCqM8ZqJmbrwPbuC/GpEgFC4rk2w2xxBNGJnw1mem2kQ5+bGgmV3NSPxl9b3HZpBjdWFPmDdGpxHAF6GAV1odIBQf5AOOri4KobRqnnl27s/kBXhKwy3kMP7eBHZYQI6VwaKfB+f2gawcT0N/YXL66zrBXTmxbc62zP2HF0j4TtA0TrEIpU8mpYsc21Qw1IopoR9xDl9eaDU/duIL+tTQomx7wU/2iY0DBJtkW7sw33PPx0PNki2a81cYSCl+5Nokx3xJRIRToUA2QjxcNhMw==","ARC-Authentication-Results":"i=1; lists.ozlabs.org;\n dmarc=pass (p=reject dis=none) header.from=nabladev.com;\n dkim=pass (2048-bit key;\n unprotected) header.d=nabladev.com header.i=@nabladev.com header.a=rsa-sha256\n header.s=dkim header.b=ViRbAUtR; dkim-atps=neutral;\n spf=pass (client-ip=178.251.229.89; helo=mx.nabladev.com;\n envelope-from=marex@nabladev.com;\n receiver=lists.ozlabs.org) smtp.mailfrom=nabladev.com","X-Greylist":"delayed 569 seconds by postgrey-1.37 at boromir;\n Sun, 05 Apr 2026 04:45:29 AEST","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com;\n\ts=dkim; t=1775327757; h=from:subject:date:message-id:to:cc:mime-version:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=NSBm8CQ9KV1sZc8xqRJrGb0nqJcw/MhMvwITjTm4MlU=;\n\tb=ViRbAUtRvwhoms+GPAP50uGr+Fp0PaHUne+gjQOz+eAmdLPm7y0XhoHq4vwoY1j4vwGZiq\n\tOFxMEJMjVq7q5t4IWVCuReOUCQcDeO2YwfwTUdjqiCDOVU58T62n5vcFqawha1xaZKQEZ0\n\tX3vrGhWvNAShQ1aweYxL0DXdk8hT9mcc5poluSoIvX7oqZ1sZOSMh8HVVOgb3F1L68eVcc\n\trd5N4QorFVSLTLj/RlnZqyosbDQjqtW4rV+LUeqvde2p2JSogw2vXDdr/odeb0S2vQXOcQ\n\thz6OkvMGiyjgwnmwY+Tr5X6YPA8TbUys9pj8u6OPZpLPe7iAvIOy/jE+PKojiQ==","From":"Marek Vasut ","To":"linux-sound@vger.kernel.org","Cc":"Marek Vasut ,\n\tConor Dooley ,\n\tFabio Estevam ,\n\tJaroslav Kysela ,\n\tKrzysztof Kozlowski ,\n\tLiam Girdwood ,\n\tMark Brown ,\n\tNicolin Chen ,\n\tRob Herring ,\n\tShengjiu Wang ,\n\tTakashi Iwai ,\n\tXiubo Li ,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinuxppc-dev@lists.ozlabs.org","Subject":"[PATCH v2 2/2] ASoC: fsl_sai: Add RX/TX BCLK swap support","Date":"Sat, 4 Apr 2026 20:35:01 +0200","Message-ID":"<20260404183547.46509-2-marex@nabladev.com>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260404183547.46509-1-marex@nabladev.com>","References":"<20260404183547.46509-1-marex@nabladev.com>","X-Mailing-List":"linuxppc-dev@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Archive":",\n ","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Last-TLS-Session-Version":"TLSv1.3","X-Spam-Status":"No, score=-0.2 required=3.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tDKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1 OzLabs 8","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"Add support for setting the Bit Clock Swap bit in CR2 register\nvia new \"fsl,sai-bit-clock-swap\" DT property. This bit swaps the\nbit clock used by the transmitter or receiver in asynchronous mode,\ni.e. makes transmitter use RX_BCLK and TX_SYNC, and vice versa,\nmakes receiver use TX_BCLK and RX_SYNC.\n\nSigned-off-by: Marek Vasut \n---\nCc: Conor Dooley \nCc: Fabio Estevam \nCc: Jaroslav Kysela \nCc: Krzysztof Kozlowski \nCc: Liam Girdwood \nCc: Mark Brown \nCc: Nicolin Chen \nCc: Rob Herring \nCc: Shengjiu Wang \nCc: Takashi Iwai \nCc: Xiubo Li \nCc: devicetree@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nCc: linux-sound@vger.kernel.org\nCc: linuxppc-dev@lists.ozlabs.org\n---\nV2: Update email, rebase on next\n---\n sound/soc/fsl/fsl_sai.c | 7 ++++++-\n sound/soc/fsl/fsl_sai.h | 2 ++\n 2 files changed, 8 insertions(+), 1 deletion(-)","diff":"diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c\nindex bd336d2e4cb38..87a40e2b9fdf7 100644\n--- a/sound/soc/fsl/fsl_sai.c\n+++ b/sound/soc/fsl/fsl_sai.c\n@@ -355,6 +355,9 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,\n \tunsigned int ofs = sai->soc_data->reg_offset;\n \tu32 val_cr2 = 0, val_cr4 = 0;\n \n+\tif (sai->is_bit_clock_swap)\n+\t\tval_cr2 |= FSL_SAI_CR2_BCS;\n+\n \tif (!sai->is_lsb_first)\n \t\tval_cr4 |= FSL_SAI_CR4_MF;\n \n@@ -453,7 +456,8 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,\n \t}\n \n \tregmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs),\n-\t\t\t FSL_SAI_CR2_BCP | FSL_SAI_CR2_BCD_MSTR, val_cr2);\n+\t\t\t FSL_SAI_CR2_BCS | FSL_SAI_CR2_BCP | FSL_SAI_CR2_BCD_MSTR,\n+\t\t\t val_cr2);\n \tregmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),\n \t\t\t FSL_SAI_CR4_MF | FSL_SAI_CR4_FSE |\n \t\t\t FSL_SAI_CR4_FSP | FSL_SAI_CR4_FSD_MSTR, val_cr4);\n@@ -1507,6 +1511,7 @@ static int fsl_sai_probe(struct platform_device *pdev)\n \tsai->soc_data = of_device_get_match_data(dev);\n \n \tsai->is_lsb_first = of_property_read_bool(np, \"lsb-first\");\n+\tsai->is_bit_clock_swap = of_property_read_bool(np, \"fsl,sai-bit-clock-swap\");\n \n \tbase = devm_platform_get_and_ioremap_resource(pdev, 0, &sai->res);\n \tif (IS_ERR(base))\ndiff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h\nindex af967833b6eda..6d84e5ff2258e 100644\n--- a/sound/soc/fsl/fsl_sai.h\n+++ b/sound/soc/fsl/fsl_sai.h\n@@ -118,6 +118,7 @@\n \n /* SAI Transmit and Receive Configuration 2 Register */\n #define FSL_SAI_CR2_SYNC\tBIT(30)\n+#define FSL_SAI_CR2_BCS\t\tBIT(29)\n #define FSL_SAI_CR2_BCI\t\tBIT(28)\n #define FSL_SAI_CR2_MSEL_MASK\t(0x3 << 26)\n #define FSL_SAI_CR2_MSEL_BUS\t0\n@@ -301,6 +302,7 @@ struct fsl_sai {\n \tstruct fsl_sai_dl_cfg *dl_cfg;\n \tunsigned int dl_cfg_cnt;\n \tbool mclk_direction_output;\n+\tbool is_bit_clock_swap;\n \n \tunsigned int mclk_id[2];\n \tunsigned int mclk_streams;\n","prefixes":["v2","2/2"]}