{"id":2219545,"url":"http://patchwork.ozlabs.org/api/patches/2219545/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260403-enetc-v1-3-e42ae28ae3fe@nxp.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260403-enetc-v1-3-e42ae28ae3fe@nxp.com>","list_archive_url":null,"date":"2026-04-03T09:41:28","name":"[v1,3/3] imx952_evk: Enable ENETC0","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"0479820c97d477112bc9eb7b9cb8ba8ac9aecb04","submitter":{"id":80695,"url":"http://patchwork.ozlabs.org/api/people/80695/?format=json","name":"Alice Guo (OSS)","email":"alice.guo@oss.nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260403-enetc-v1-3-e42ae28ae3fe@nxp.com/mbox/","series":[{"id":498615,"url":"http://patchwork.ozlabs.org/api/series/498615/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=498615","date":"2026-04-03T09:41:25","name":"Enable ENETC on i.MX952 EVK","version":1,"mbox":"http://patchwork.ozlabs.org/series/498615/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2219545/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219545/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com\n header.a=rsa-sha256 header.s=selector1-NXP1-onmicrosoft-com\n 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phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Alice Guo \n\nEnable ENETC0 functionality on the i.MX952 EVK board.\n\nSigned-off-by: Alice Guo \n---\n arch/arm/dts/imx952-evk-u-boot.dtsi | 94 +++++++++++++++++++++++++++++++++\n arch/arm/dts/imx952-u-boot.dtsi | 100 ++++++++++++++++++++++++++++++++++++\n configs/imx952_evk_defconfig | 3 ++\n 3 files changed, 197 insertions(+)","diff":"diff --git a/arch/arm/dts/imx952-evk-u-boot.dtsi b/arch/arm/dts/imx952-evk-u-boot.dtsi\nindex b872c3a7273..2a1770e694a 100644\n--- a/arch/arm/dts/imx952-evk-u-boot.dtsi\n+++ b/arch/arm/dts/imx952-evk-u-boot.dtsi\n@@ -5,6 +5,100 @@\n \n #include \"imx952-u-boot.dtsi\"\n \n+&enetc0 {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_enetc0>;\n+\tphy-handle = <ðphy0>;\n+\tphy-mode = \"rgmii-id\";\n+\tstatus = \"okay\";\n+};\n+\n+&lpi2c6 {\n+\tclock-frequency = <100000>;\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_lpi2c6>;\n+\tstatus = \"okay\";\n+\n+\tpcal6416: gpio@21 {\n+\t\tcompatible = \"nxp,pcal6416\";\n+\t\t#gpio-cells = <2>;\n+\t\tgpio-controller;\n+\t\treg = <0x21>;\n+\t\tinterrupt-controller;\n+\t\t#interrupt-cells = <2>;\n+\t\tinterrupt-parent = <&gpio2>;\n+\t\tinterrupts = <10 IRQ_TYPE_LEVEL_LOW>;\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&pinctrl_pcal6416>;\n+\t\tvcc-supply = <®_3p3v>;\n+\t};\n+};\n+\n+&netc_blk_ctrl {\n+\tstatus = \"okay\";\n+};\n+\n+&netc_bus0 {\n+\tstatus = \"okay\";\n+};\n+\n+&netc_emdio {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&pinctrl_emdio>;\n+\tstatus = \"okay\";\n+\n+\tethphy0: ethernet-phy@1 {\n+\t\treg = <1>;\n+\t\treset-gpios = <&pcal6416 13 GPIO_ACTIVE_LOW>;\n+\t\treset-assert-us = <10000>;\n+\t\treset-deassert-us = <80000>;\n+\t\trealtek,clkout-disable;\n+\t};\n+};\n+\n+&netc_timer {\n+\tstatus = \"okay\";\n+};\n+\n &wdog3 {\n \tstatus = \"disabled\";\n };\n+\n+&scmi_iomuxc {\n+\tpinctrl_lpi2c6: lpi2c6grp {\n+\t\tfsl,pins = <\n+\t\t\tIMX952_PAD_GPIO_IO02__WAKEUPMIX_TOP_LPI2C6_SDA\t\t0x40000b9e\n+\t\t\tIMX952_PAD_GPIO_IO03__WAKEUPMIX_TOP_LPI2C6_SCL\t\t0x40000b9e\n+\t\t>;\n+\t};\n+\n+\tpinctrl_pcal6416: pcal6416grp {\n+\t\tfsl,pins = <\n+\t\t\tIMX952_PAD_GPIO_IO10__WAKEUPMIX_TOP_GPIO2_IO_10\t\t0x31e\n+\t\t>;\n+\t};\n+\n+\tpinctrl_emdio: emdiogrp{\n+\t\tfsl,pins = <\n+\t\t\tIMX952_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC\t\t0x50e\n+\t\t\tIMX952_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO\t\t0x90e\n+\t\t>;\n+\t};\n+\n+\tpinctrl_enetc0: enetc0grp {\n+\t\tfsl,pins = <\n+\t\t\tIMX952_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3\t0x50e\n+\t\t\tIMX952_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2\t0x50e\n+\t\t\tIMX952_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1\t0x50e\n+\t\t\tIMX952_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0\t0x50e\n+\t\t\tIMX952_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL\t0x50e\n+\t\t\tIMX952_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK\t0x58e\n+\t\t\tIMX952_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL\t0x50e\n+\t\t\tIMX952_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK\t0x58e\n+\t\t\tIMX952_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0\t0x50e\n+\t\t\tIMX952_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1\t0x50e\n+\t\t\tIMX952_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2\t0x50e\n+\t\t\tIMX952_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3\t0x50e\n+\t\t>;\n+\t};\n+};\ndiff --git a/arch/arm/dts/imx952-u-boot.dtsi b/arch/arm/dts/imx952-u-boot.dtsi\nindex e977014992e..179e287dbf2 100644\n--- a/arch/arm/dts/imx952-u-boot.dtsi\n+++ b/arch/arm/dts/imx952-u-boot.dtsi\n@@ -223,6 +223,106 @@\n \n &{/soc} {\n \tbootph-all;\n+\n+\tnetc_blk_ctrl: netc-blk-ctrl@4cd20000 {\n+\t\tcompatible = \"nxp,imx952-netc-blk-ctrl\";\n+\t\treg = <0x0 0x4cd20000 0x0 0x10000>,\n+\t\t <0x0 0x4cd30000 0x0 0x10000>,\n+\t\t <0x0 0x4c81000c 0x0 0x1c>;\n+\t\treg-names = \"ierb\", \"prb\", \"netcmix\";\n+\t\t#address-cells = <2>;\n+\t\t#size-cells = <2>;\n+\t\tranges;\n+\t\tpower-domains = <&scmi_devpd IMX952_PD_NETC>;\n+\t\tassigned-clocks = <&scmi_clk IMX952_CLK_ENET>,\n+\t\t\t\t <&scmi_clk IMX952_CLK_ENETREF>;\n+\t\tassigned-clock-parents = <&scmi_clk IMX952_CLK_SYSPLL1_PFD2>,\n+\t\t\t\t\t <&scmi_clk IMX952_CLK_SYSPLL1_PFD0>;\n+\t\tassigned-clock-rates = <666666666>, <250000000>;\n+\t\tclocks = <&scmi_clk IMX952_CLK_CGC_NETC>;\n+\t\tclock-names = \"ipg\";\n+\n+\t\tnetc_bus0: pcie@4ca00000 {\n+\t\t\tcompatible = \"pci-host-ecam-generic\";\n+\t\t\treg = <0x0 0x4ca00000 0x0 0x100000>;\n+\t\t\t#address-cells = <3>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tdevice_type = \"pci\";\n+\t\t\tlinux,pci-domain = <0>;\n+\t\t\tbus-range = <0x0 0x0>;\n+\t\t\tmsi-map = <0x000 &its 0x60 0x1>, //ENETC0 PF\n+\t\t\t\t <0x001 &its 0x62 0x1>, //NETC Timer\n+\t\t\t\t <0x002 &its 0x63 0x1>, //EMDIO\n+\t\t\t\t <0x040 &its 0x64 0x1>; //ENETC0 VF\n+\t\t\t\t /* ENETC0 BAR0 - non-prefetchable memory */\n+\t\t\tranges = <0x82000000 0x0 0x4cc00000 0x0 0x4cc00000 0x0 0x40000\n+\t\t\t\t /* Timer and EMDIO BAR0/2 and ENETC0 VF BAR0 - non-prefetchable memory */\n+\t\t\t\t 0x82000000 0x0 0x4cc80000 0x0 0x4cc80000 0x0 0x70000\n+\t\t\t\t /* ENETC0 VF BAR2 - non-prefetchable memory */\n+\t\t\t\t 0x82000000 0x0 0x4cd00000 0x0 0x4cd00000 0x0 0x10000>;\n+\n+\t\t\tenetc0: ethernet@0,0 {\n+\t\t\t\tcompatible = \"pci1131,e101\";\n+\t\t\t\treg = <0x00000 0 0 0 0>;\n+\t\t\t\tclocks = <&scmi_clk IMX952_CLK_ENETREF>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n+\t\t\tnetc_timer: ethernet@0,1 {\n+\t\t\t\tcompatible = \"pci1131,ee02\";\n+\t\t\t\treg = <0x00100 0 0 0 0>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n+\t\t\tnetc_emdio: mdio@0,2 {\n+\t\t\t\tcompatible = \"pci1131,ee00\";\n+\t\t\t\treg = <0x00200 0 0 0 0>;\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n+\t\t\trcec@1,0 {\n+\t\t\t\tcompatible = \"pci1131,e001\";\n+\t\t\t\treg = <0x00800 0 0 0 0>;\n+\t\t\t\tinterrupts = ;\n+\t\t\t};\n+\t\t};\n+\n+\t\tnetc_bus1: pcie@4cb00000 {\n+\t\t\tcompatible = \"pci-host-ecam-generic\";\n+\t\t\treg = <0x0 0x4cb00000 0x0 0x100000>;\n+\t\t\t#address-cells = <3>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tdevice_type = \"pci\";\n+\t\t\tlinux,pci-domain = <1>;\n+\t\t\tbus-range = <0x1 0x1>;\n+\t\t\tmsi-map = <0x100 &its 0x61 0x1>, //ENETC1 PF\n+\t\t\t\t <0x140 &its 0x65 0x1>; //ENETC1 VF\n+\t\t\t\t /* ENETC1 BAR0 - non-prefetchable memory */\n+\t\t\tranges = <0x82000000 0x0 0x4cc40000 0x0 0x4cc40000 0x0 0x40000\n+\t\t\t\t /* ENETC1: VF BAR0 - non-prefetchable memory */\n+\t\t\t\t 0x82000000 0x0 0x4ccf0000 0x0 0x4ccf0000 0x0 0x10000\n+\t\t\t\t /* ENETC1: VF BAR2 - non-prefetchable memory */\n+\t\t\t\t 0x82000000 0x0 0x4cd10000 0x0 0x4cd10000 0x0 0x10000>;\n+\t\t\tpower-domains = <&scmi_devpd IMX952_PD_NETC>;\n+\n+\t\t\tenetc1: ethernet@0,0 {\n+\t\t\t\tcompatible = \"pci1131,e101\";\n+\t\t\t\treg = <0x10000 0 0 0 0>;\n+\t\t\t\tclocks = <&scmi_clk IMX952_CLK_ENETREF>;\n+\t\t\t\tclock-names = \"ref\";\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n+\t\t\trcec@1,0 {\n+\t\t\t\tcompatible = \"pci1131,e001\";\n+\t\t\t\treg = <0x10800 0 0 0 0>;\n+\t\t\t\tinterrupts = ;\n+\t\t\t};\n+\t\t};\n+\t};\n };\n \n &sram0 {\ndiff --git a/configs/imx952_evk_defconfig b/configs/imx952_evk_defconfig\nindex a700aea67a1..c03f3dec89d 100644\n--- a/configs/imx952_evk_defconfig\n+++ b/configs/imx952_evk_defconfig\n@@ -40,6 +40,7 @@ CONFIG_DEFAULT_FDT_FILE=\"freescale/imx952-evk.dtb\"\n CONFIG_SYS_CBSIZE=2048\n CONFIG_SYS_PBSIZE=2074\n CONFIG_BOARD_LATE_INIT=y\n+CONFIG_PCI_INIT_R=y\n CONFIG_SPL_MAX_SIZE=0x30000\n CONFIG_SPL_BOARD_INIT=y\n CONFIG_SPL_LOAD_IMX_CONTAINER=y\n@@ -111,6 +112,8 @@ CONFIG_DM_PCA953X=y\n CONFIG_ADP5585_GPIO=y\n CONFIG_DM_I2C=y\n CONFIG_SYS_I2C_IMX_LPI2C=y\n+CONFIG_I2C_MUX=y\n+CONFIG_I2C_MUX_PCA954x=y\n CONFIG_IMX_MU_MBOX=y\n CONFIG_SUPPORT_EMMC_RPMB=y\n CONFIG_SUPPORT_EMMC_BOOT=y\n","prefixes":["v1","3/3"]}