{"id":2219466,"url":"http://patchwork.ozlabs.org/api/patches/2219466/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260403035541.18355-4-zhenzhong.duan@intel.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260403035541.18355-4-zhenzhong.duan@intel.com>","list_archive_url":null,"date":"2026-04-03T03:55:27","name":"[v3,03/14] vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID flag","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"bb4701b54b18e0a4e6ec92216f5e439d3c5ffc91","submitter":{"id":81636,"url":"http://patchwork.ozlabs.org/api/people/81636/?format=json","name":"Duan, Zhenzhong","email":"zhenzhong.duan@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260403035541.18355-4-zhenzhong.duan@intel.com/mbox/","series":[{"id":498583,"url":"http://patchwork.ozlabs.org/api/series/498583/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498583","date":"2026-04-03T03:55:36","name":"intel_iommu: Enable PASID support for passthrough device","version":3,"mbox":"http://patchwork.ozlabs.org/series/498583/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2219466/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219466/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=G0qJd9iq;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=\"76140602\"","E=Sophos;i=\"6.23,157,1770624000\"; d=\"scan'208\";a=\"76140602\"","E=Sophos;i=\"6.23,157,1770624000\"; d=\"scan'208\";a=\"223884852\""],"X-ExtLoop1":"1","From":"Zhenzhong Duan ","To":"qemu-devel@nongnu.org","Cc":"alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan ","Subject":"[PATCH v3 03/14] vfio/iommufd: Create nesting parent hwpt with\n IOMMU_HWPT_ALLOC_PASID flag","Date":"Thu, 2 Apr 2026 23:55:27 -0400","Message-ID":"<20260403035541.18355-4-zhenzhong.duan@intel.com>","X-Mailer":"git-send-email 2.47.3","In-Reply-To":"<20260403035541.18355-1-zhenzhong.duan@intel.com>","References":"<20260403035541.18355-1-zhenzhong.duan@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=198.175.65.19;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com","X-Spam_score_int":"-48","X-Spam_score":"-4.9","X-Spam_bar":"----","X-Spam_report":"(-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.542,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"When both device and vIOMMU have PASID enabled, then guest may setup\npasid attached translation.\n\nVFIO needs to be aware of potential pasid usage and should attach the\nnon-pasid part of pasid-capable device to hwpt flagged with\nIOMMU_HWPT_ALLOC_PASID.\n\nARM SMMU doesn't support IOMMU_HWPT_ALLOC_PASID, only VTD need it. So\nwe can't check the existing vIOMMU flag VIOMMU_FLAG_PASID_SUPPORTED to\ndetermine if set flag IOMMU_HWPT_ALLOC_PASID. Instead, introduce a new\nflag VIOMMU_FLAG_WANT_PASID_ATTACH which will only be exposed by VTD.\n\nSigned-off-by: Zhenzhong Duan \nReviewed-by: Yi Liu \nTested-by: Xudong Hao \n---\n include/hw/core/iommu.h | 1 +\n include/hw/vfio/vfio-device.h | 1 +\n hw/vfio/device.c | 11 +++++++++++\n hw/vfio/iommufd.c | 8 +++++++-\n 4 files changed, 20 insertions(+), 1 deletion(-)","diff":"diff --git a/include/hw/core/iommu.h b/include/hw/core/iommu.h\nindex bfcd511013..67c575b08c 100644\n--- a/include/hw/core/iommu.h\n+++ b/include/hw/core/iommu.h\n@@ -21,6 +21,7 @@ enum viommu_flags {\n /* vIOMMU needs nesting parent HWPT to create nested HWPT */\n VIOMMU_FLAG_WANT_NESTING_PARENT = BIT_ULL(0),\n VIOMMU_FLAG_PASID_SUPPORTED = BIT_ULL(1),\n+ VIOMMU_FLAG_WANT_PASID_ATTACH = BIT_ULL(2),\n };\n \n /* Host IOMMU quirks. Extracted from host IOMMU capabilities */\ndiff --git a/include/hw/vfio/vfio-device.h b/include/hw/vfio/vfio-device.h\nindex 828a31c006..d6e522f8b8 100644\n--- a/include/hw/vfio/vfio-device.h\n+++ b/include/hw/vfio/vfio-device.h\n@@ -268,6 +268,7 @@ void vfio_device_prepare(VFIODevice *vbasedev, VFIOContainer *bcontainer,\n void vfio_device_unprepare(VFIODevice *vbasedev);\n \n bool vfio_device_get_viommu_flags_want_nesting(VFIODevice *vbasedev);\n+bool vfio_device_get_viommu_flags_want_pasid_attach(VFIODevice *vbasedev);\n bool vfio_device_get_host_iommu_quirk_bypass_ro(VFIODevice *vbasedev,\n uint32_t type, void *caps,\n uint32_t size);\ndiff --git a/hw/vfio/device.c b/hw/vfio/device.c\nindex 973fc35b59..bc1d37e776 100644\n--- a/hw/vfio/device.c\n+++ b/hw/vfio/device.c\n@@ -533,6 +533,17 @@ bool vfio_device_get_viommu_flags_want_nesting(VFIODevice *vbasedev)\n return false;\n }\n \n+bool vfio_device_get_viommu_flags_want_pasid_attach(VFIODevice *vbasedev)\n+{\n+ VFIOPCIDevice *vdev = vfio_pci_from_vfio_device(vbasedev);\n+\n+ if (vdev) {\n+ return !!(pci_device_get_viommu_flags(PCI_DEVICE(vdev)) &\n+ VIOMMU_FLAG_WANT_PASID_ATTACH);\n+ }\n+ return false;\n+}\n+\n bool vfio_device_get_host_iommu_quirk_bypass_ro(VFIODevice *vbasedev,\n uint32_t type, void *caps,\n uint32_t size)\ndiff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c\nindex ecabc33064..ead40b6617 100644\n--- a/hw/vfio/iommufd.c\n+++ b/hw/vfio/iommufd.c\n@@ -363,6 +363,7 @@ static bool iommufd_cdev_autodomains_get(VFIODevice *vbasedev,\n VendorCaps caps;\n VFIOIOASHwpt *hwpt;\n uint32_t hwpt_id;\n+ uint8_t max_pasid_log2 = 0;\n int ret;\n \n /* Try to find a domain */\n@@ -408,7 +409,7 @@ static bool iommufd_cdev_autodomains_get(VFIODevice *vbasedev,\n */\n if (!iommufd_backend_get_device_info(vbasedev->iommufd, vbasedev->devid,\n &type, &caps, sizeof(caps), &hw_caps,\n- NULL, errp)) {\n+ &max_pasid_log2, errp)) {\n return false;\n }\n \n@@ -430,6 +431,11 @@ static bool iommufd_cdev_autodomains_get(VFIODevice *vbasedev,\n }\n }\n \n+ if (max_pasid_log2 &&\n+ vfio_device_get_viommu_flags_want_pasid_attach(vbasedev)) {\n+ flags |= IOMMU_HWPT_ALLOC_PASID;\n+ }\n+\n if (cpr_is_incoming()) {\n hwpt_id = vbasedev->cpr.hwpt_id;\n goto skip_alloc;\n","prefixes":["v3","03/14"]}